Page 101 - Handout Digital Electronics
P. 101
0 1 0 0 1
0 1 1 0 1
1 0 0 0 1
1 0 1 0 1
1 1 0 1 0
1 1 1 x x
From the experimental truth table, the introduction of the clock influenced the flip flop. When the
clock(C) = 0, the flip flop does not change its states but changes the states as soon as the clock is 1.
However, the introduction of the clock did not eliminate the ambiguous case.
Below is the summarized standard state table of the clocked SR flip flop
C S R Q Q Name
1 0 0 0 1 No change
1 0 1 0 1 Reset (clear to 0)
1 1 0 1 0 Set to 1 (store)
1 1 1 x x Not allowed
The Clocked SR flip flop can also be implemented on NAND gates only. For example, below is the
clocked SR flip flop logic implemented on NAND gates only
Figure 36: Clocked SR flip flop implemented on NAND gates only
As can be seen below, both truth tables are the same and these are standard truth tables.
C S R Q Q Name
1 0 0 0 1 No change
1 0 1 0 1 Reset (clear to 0)
1 1 0 1 0 Set to 1 (store)
1 1 1 x x Not allowed
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