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CAVITE STATE UNIVERSITY
                               T3 CAMPUS
                               Department of Information Technology          COSC 65 – Programming Languages

               Second Group: MUL, IMUL, DIV, IDIV
               These types of operands are supported:
                       REG
                       memory

               REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI, SI, BP, SP.
               memory: [BX], [BX+SI+7], variable, etc.…

               MUL and IMUL instructions affect these flags only: CF, OF.

               When the result is over operand size, these flags are set to 1, when result fits in operand size,
               these flags are set to 0.

               For DIV and IDIV flags are undefined.

                 MUL – Unsigned Multiply:                     IMUL – Singed Multiply:
                              When operand is a byte:                When operand is a byte:
                              AX = AL * operand.                     AX = AL * operand.

                              When operand is a word:                When operand is a word:
                              (DX AX) = AX * operand.                (DX AX) = AX * operand.

                 DIV – Unsigned Divide:                       IDIV – Signed Divide:
                              When operand is a byte:                When operand is a byte:
                              AL = AX / operand                      AL = AX / operand
                              AH = remainder (modulus)               AH = remainder (modulus).

                              When operand is a word:                When operand is a word:
                              AX = (DX AX) / operand                 AX = (DX AX) / operand
                              DX = remainder (modulus)               DX = remainder (modulus).

                  MUL Instructions

                                                                  Multiplicand   Multiplier    Product
                  MUL reg/mem8         ;  8 bit reg to 8 bit mem
                  MUL reg/mem16        ; 16 bit reg to 16 bit mem           AL     reg/mem8         AX
                  MUL reg/mem32        ; 32 bit reg to 32 big mem           AX    reg/mem16       DX:AX

                                             ; Sample code for MUL Instruction
                                             .model small
                                             .data
                                             .code
                                             main proc
                                                     mov ax, 2000h
                                                    mov bx, 100h
                                                    mul bx
                                             endp
                                             end main

                 Note: You can use the single step process on emu8086 to check what’s happening on our code.









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