Page 74 - Programmable Logic Controllers, Fifth Edition - Mobile version

Table 3-8 Partial Listing of ASCII Code
Character 7-Bit ASCII Character 7-Bit ASCII

A 100 0001 X 101 1000
B 100 0010 Y 101 1001
C 100 0011 Z 101 1010
D 100 0100 0 011 0000
E 100 0101 1 011 0001
F 100 0110 2 011 0010
G 100 0111 3 011 0011
H 100 1000 4 011 0100
I 100 1001 5 011 0101
J 100 1010 6 011 0110
K 100 1011 7 011 0111
L 100 1100 8 011 1000
M 100 1101 9 011 1001
N 100 1110 blank 010 0000
O 100 1111 010 1110
P 101 0000 , 010 1100
Q 101 0001 + 010 1011
R 101 0010 − 010 1101
S 101 0011 # 010 0011
T 101 0100 ( 010 1000
U 101 0101 % 010 0101
V 101 0110 = 011 1101
W 101 0111

Table 3-9 Odd and Even Parity 3.10 Binary Arithmetic

Even Odd Arithmetic circuit units form a part of the CPU. Mathe-
Character Parity Bit Parity Bit matical operations include addition, subtraction, multipli-
cation, and division. Binary addition follows rules similar
0000 0 1 to decimal addition. When adding with binary numbers,
0001 1 0 there are only four conditions that can occur:

0010 1 0
0 1 0 1
0011 0 1 +0 +0 +1 +1
0100 1 0 0 1 1 0 carry 1
0101 0 1
The first three conditions are easy because they are
0110 0 1
like adding decimals, but the last condition is slightly
0111 1 0 different. In decimal, 1 + 1 = 2. In binary, a 2 is writ-
1000 1 0 ten 10. Therefore, in binary, 1 + 1 = 0, with a carry of
1 to the next most significant place value. When add-
1001 0 1
ing larger binary numbers, the resulting 1s are carried

Number Systems and Codes Chapter 3 55

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