Page 13 - Semester-IV-Electronics

 Two differential transistors Q and Q used in the circuit.
1 2

 Temperature to remain same and changes in parameter are equal so

that no effect of these changes in the output signal in the differential

mode.

 Collectors of Q and Q connected to V cc (power supply) through
2
1
equal load resistance R .
L

 Emitters of Q and Q connected to each other and then connected to
1
2
the emitter power supply VEE through a high resistance RE.

 Input signals of v and v applied to bases of Q and Q .
2
2
1
1
 Output signal is obtained between collectors of Q and Q , i.e.
1
2
between A and B.

 In common-mode, input signals are equal in magnitude and in phase,

v = v .
1
2

 In actual, common-mode signals are not applied but are produced

due to asymmetry of the circuit. Signals in common-mode be at the

lowest level (as shown in Figure 1).
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