Page 16 - mlcc-170613

MULTILAYER CERAMIC CAPACITORS

NPO 額定電壓低於 200 伏之電容，其耐電壓高於 8 倍額 以 300 伏每秒的增加速率直至
X7R/X5R/ 定電壓(More than 8 times of rated voltage. This spec is 電容被擊穿或 ARC 時最大瞬
X6S/X7T/ suitable to the rated voltages no greater than 100V.)。 間電壓（By increment rate 300
X7S/Y5V VDC /sec. until chip breakdown）。
NPO 200 伏︰3 倍額定電壓(200V: 3 times of rated voltage) 以 300 伏每秒的增加速率直至
X7R 500 伏︰2 倍額定電壓 500V: 2 times of rated voltage 電容被擊穿或 ARC 時最大瞬
X7T 1000 伏︰1.5 倍額定電壓(1000V: 1.5times of rated 間電壓(By increment rate 300
X7S voltage) VDC /sec. until chip breakdown)
≧2000 伏︰1 倍額定電壓(≧2000V: 1times of rated
voltage)

8.2 應力測試 (Break Strength)

電介質(Dielectrics) 判定標準(Specification) 測試條件(Testing Condition)
NPO 各種厚度能承受的力 如下圖加壓並記錄至破裂時所需力量
X7R/X5R (Thickness Force Value (AVE - 3s)) (Apply force as shown and record the force figure
X6S/X7T A ≧0.5Kg while the capacitor breaks.)。
X7S/Y5V B ≧1.0Kg
C ≧2.0Kg Force
D ≧3.5Kg
E ≧3.5Kg Pressuring Rod →
Capacitor
F ≧3.5Kg
H ≧0.4Kg ↘
Testing Stand →

8.3 抗曲繞測試 (Bending)

電介質(Dielectrics) 判定標準(Specification) 測試條件(Testing Condition)
NPO 外觀無明顯破損，容值≦ 將晶片焊接於測試板並將其置於測試機上，以 0.2±
10pF 時，容值變化≦0.5pF， 0.1mm/sec 的速度下壓測試板中央位置至測試深度
容值>10pF 時，容值變化在 1.0±0.1mm，並停留 5±1sec，才可進行測試容值 Solder
±5%之內 the capacitor on testing substrate and put it on testing stand.
No remarkable visual damage The middle part of substrate shall successively be
Cp change≦0.5pF (Cp≦10pF) pressurized by pressurizing rod at a rated of about
Cp change within±5% 0.2±0.1mm/sec. until the deflection become means of the
(Cp>10pF) 1.0±0.1mm and lease the pressurizing rod after 5±1 sec. To
X7R/X5R 外觀無明顯破損，容值變化 measure the capacitance.
X6S/X7T 在±12.5%之內 (相關標準(Related STD.): JIS C 5101-10-1999 / JIS
No remarkable visual damage C 6429)
Cp change within ±12.5%

- 16 -
(2016/08/10 revised)