Page 262 - Programmable Logic Controllers, Fifth Edition - Mobile version
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L1   Input     SW    Ladder logic program             L1   Input     SW    Ladder logic program
                                            NEG                                                   TOD
                               SW           NEGATE                                   SW           TO BCD
                                            Source A       N7:52                                  Source         N7:23
                                                             101                                                   10
                                            Destination    N7:53                                  Destination    O:20
                                                            –101                                                   16


                   Figure 11-17   SLC 500 NEG (negate) instruction.      Figure 11-19  SLC 500 TOD (convert to BCD) instruction.



                     •  The positive value 101 stored at the source address   •  The source displays the value 10, which is the
                       N7:52 is negated to –101 and stored in destination    correct decimal value; however, the destination
                       address N7:53.                                        displays the value 16.
                     •  Positive numbers will be stored in straight binary   •  The processor interprets all bit patterns as binary;
                       format, and negative numbers will be stored as 2’s    therefore the value 16 is the binary interpretation of
                       complement.                                           the BCD bit pattern.
                     The program of Figure 11-18 is an example of the clear   •  The bit pattern for 10 BCD is the same as the bit
                   (CLR) instruction. The operation of the logic rung can be   pattern for 16 binary.
                   summarized as follows:                                  The  convert from BCD (FRD) instruction is used to

                     •  When input switch SW is closed the CLR instruc-  convert binary-coded decimal (BCD) values to integer val-
                       tion is executed.                                 ues. This instruction could be used to convert data from a
                     •  Upon execution it sets all bits of a word to zero.  BCD external source, such as a BCD thumbwheel switch,
                     •  In this example it changes the value of all bits stored   to the binary format in which the processor operates. The
                       in the destination address N7:22 to 0.            program of Figure 11-20 is an example of the FRD instruc-
                                                                         tion. The operation of the logic rung can be summarized as
                     The  convert to BCD (TOD) instruction is used to    follows:
                   convert  16-bit  integers  into  binary-coded decimal
                   (BCD) values.  This instruction could be used when      •  When input switch SW is closed the FDR instruc-
                   transferring data from the processor (which stores data   tion is executed.
                   in binary format) to an external device, such as an LED   •  The BCD bit pattern stored at the source address
                   display, that functions in BCD format. The program of     I:30 is converted into a binary bit pattern of the same
                   Figure 11-19 is an example of the TOD instruction. The    decimal value at the destination address, N7:24.
                   operation of the logic rung can be summarized as follows:  At times it is necessary to make conversions to ana-

                     •  When input switch SW is closed the TOD instruc-  log input and output values to ensure correct interpreta-
                       tion is executed.                                 tion and processing. As a result, data must be scaled, or
                     •  The binary bit pattern at the source address N7:23 is   resized, before it can be used by a PLC control algorithm
                       converted into a BCD bit pattern of the same deci-  or output to a field device. The SLC 500 Scale data (SCL)
                       mal value at the destination address O:20.        and Scale with Parameters (SCP) instructions are used to


                                                                                 Input           Ladder logic program
                             Input         Ladder logic program             L1             SW
                                                                                                  FRD
                        L1             SW                                                         FROM BCD
                                              CLR                                    SW           Source          I:30
                                 SW           CLEAR                                                                 16
                                              Destination  N7:22
                                               0000000000000000                                   Destination    N7:24
                                                                                                                   10


                                                                         Figure 11-20  SLC 500 FRD (convert from BCD)
                   Figure 11-18  SLC 500 CLR (clear) instruction.        instruction.



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