Page 56 - vinafix.com_Compal AAL15 LA-D071P r1.0

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PEG_HTX_C_GRX_P[0..3]
<10> PEG_HTX_C_GRX_P[0..3] No Use GPU Display Port outpud
PEG_HTX_C_GRX_N[0..3]
<10> PEG_HTX_C_GRX_N[0..3]
PEG_GTX_C_HRX_P[0..3] @
<10> PEG_GTX_C_HRX_P[0..3] UV1F
PEG_GTX_C_HRX_N[0..3] +VGA_CORE_MESO
<10> PEG_GTX_C_HRX_N[0..3]
@ AB11
UV1A VARY_BL AB12
DIGON
A A
AL15
TXCAP_DPA3P AK14
PEG_HTX_C_GRX_P0 MESO@2 1 CV220 .1U_0402_16V7K PEG_HTX_GRX_P0 AF30 AH30 PEG_GTX_HRX_P0 MESO@2 1 CV1 .1U_0402_16V7K PEG_GTX_C_HRX_P0 TXCAM_DPA3N
PEG_HTX_C_GRX_N0 MESO@ 2 1 CV306 .1U_0402_16V7K PEG_HTX_GRX_N0 AE31 PCIE_RX0P PCIE_TX0P AG31 PEG_GTX_HRX_N0 MESO@ 2 1 CV2 .1U_0402_16V7K PEG_GTX_C_HRX_N0 AH16
PCIE_RX0N PCIE_TX0N TX0P_DPA2P AJ15
TX0M_DPA2N
PEG_HTX_C_GRX_P1 MESO@ 2 1 CV308 .1U_0402_16V7K PEG_HTX_GRX_P1 AE29 AG29 PEG_GTX_HRX_P1 MESO@ 2 1 CV3 .1U_0402_16V7K PEG_GTX_C_HRX_P1 AL17
PEG_HTX_C_GRX_N1 MESO@2 1 CV305 .1U_0402_16V7K PEG_HTX_GRX_N1 AD28 PCIE_RX1P PCIE_TX1P AF28 PEG_GTX_HRX_N1 MESO@2 1 CV4 .1U_0402_16V7K PEG_GTX_C_HRX_N1 TX1P_DPA1P AK16
PCIE_RX1N PCIE_TX1N TX1M_DPA1N
AH18
PEG_HTX_C_GRX_P2 MESO@ 2 1 CV307 .1U_0402_16V7K PEG_HTX_GRX_P2 AD30 AF27 PEG_GTX_HRX_P2 MESO@ 2 1 CV5 .1U_0402_16V7K PEG_GTX_C_HRX_P2 TX2P_DPA0P AJ17
PEG_HTX_C_GRX_N2 MESO@ 2 1 CV309 .1U_0402_16V7K PEG_HTX_GRX_N2 AC31 PCIE_RX2P PCIE_TX2P AF26 PEG_GTX_HRX_N2 MESO@ 2 1 CV6 .1U_0402_16V7K PEG_GTX_C_HRX_N2 TX2M_DPA0N
PCIE_RX2N PCIE_TX2N AL19
NC_TXOUT_L3P AK18
PEG_HTX_C_GRX_P3 MESO@2 1 CV219 .1U_0402_16V7K PEG_HTX_GRX_P3 AC29 AD27 PEG_GTX_HRX_P3 MESO@2 1 CV7 .1U_0402_16V7K PEG_GTX_C_HRX_P3 NC_TXOUT_L3N
PEG_HTX_C_GRX_N3 MESO@ 2 1 CV304 .1U_0402_16V7K PEG_HTX_GRX_N3 AB28 PCIE_RX3P PCIE_TX3P AD26 PEG_GTX_HRX_N3 MESO@ 2 1 CV8 .1U_0402_16V7K PEG_GTX_C_HRX_N3
PCIE_RX3N PCIE_TX3N TMDP
AB30 AC25 AH20
AA31 PCIE_RX4P PCIE_TX4P AB25 TXCBP_DPB3P AJ19
PCIE_RX4N PCIE_TX4N TXCBM_DPB3N
AL21
AA29 Y23 TX3P_DPB2P AK20
Y28 PCIE_RX5P PCIE_TX5P Y24 TX3M_DPB2N
PCIE_RX5N PCIE_TX5N AH22
TX4P_DPB1P AJ21
Y30 AB27 TX4M_DPB1N
W31 PCIE_RX6P PCIE_TX6P AB26 AL23
PCIE_RX6N PCIE_TX6N TX5P_DPB0P AK22
TX5M_DPB0N
GPU R1 GPU R3 W29 Y27 AK24
UV1 UV1 V28 PCIE_RX7P PCIE_TX7P Y26 NC_TXOUT_U3P AJ23
PCIE_RX7N PCIE_TX7N NC_TXOUT_U3N
B SA00008FE0L SA00008FE1L B
V30 W24
MESOR1@ MESOR3@ U31 NC#V30 NC#W24 W23
NC#U31 NC#W23
2160856030-A0_FCBGA631
MESO LE S3 BGA GPU 0FD MESO LE S3 FCBGA A31! ?
U29 NC#U29 NC#V27 V27
T28 U26
UV1 UV1 NC#T28 NC#U26
SA000089Y0L SA000089Y1L T30 U24
R31 NC#T30 NC#U24 U23
EXOR1@ EXOR3@ NC#R31 PCI EXPRESS INTERFACE NC#U23
EXO XT S3 FCBGA631P 0FD EXO XT S3 FCBGA A31! R29 T26
P28 NC#R29 NC#T26 T27
NC#P28 NC#T27
P30 T24
N31 NC#P30 NC#T24 T23
NC#N31 NC#T23
N29 P27
M28 NC#N29 NC#P27 P26
NC#M28 NC#P26
M30 P24
L31 NC#M30 NC#P24 P23
NC#L31 NC#P23
For EXO/MESO PCIe Gen3/Gen2 option
L29 M27
K30 NC#L29 NC#M27 N26
NC#K30 NC#N26
CV220 EXO@ CV306 EXO@ CV308 EXO@ CV305 EXO@
C CLK_PEG_VGA AK30 CLOCK C
<11> CLK_PEG_VGA CLK_PEG_VGA# AK32 PCIE_REFCLKP
<11> CLK_PEG_VGA# PCIE_REFCLKN +0.95VSDGPU 0.22U 16V 7K 0.22U 16V 7K 0.22U 16V 7K 0.22U 16V 7K
CALIBRATION SE00000R700 SE00000R700 SE00000R700 SE00000R700
Y22 RV1 1 DIS@ 2 1.69K_0402_1%
PCIE_CALR_TX
RV2 1 DIS@ 2 1K_0402_1% N10 AA22 RV3 1 DIS@ 2 1K_0402_1% CV307 EXO@ CV304 EXO@ CV3 EXO@ CV6 EXO@
TEST_PG PCIE_CALR_RX
PLT_RST_VGA# AL27
PERSTB
2160856030-A0_FCBGA631 0.22U 16V 7K 0.22U 16V 7K 0.22U 16V 7K 0.22U 16V 7K
SE00000R700 SE00000R700 SE00000R700 SE00000R700
CV309 EXO@ CV1 EXO@ CV4 EXO@ CV7 EXO@
+3VGS
UV2 0.22U 16V 7K 0.22U 16V 7K 0.22U 16V 7K 0.22U 16V 7K
DIS@
PLT_RST# 5 SE00000R700 SE00000R700 SE00000R700 SE00000R700
<11,25,29,32,36> PCH_PLTRST#_EC 1 IN1 P 4 PLT_RST_VGA#
<9> DGPU_HOLD_RST# 2 IN2 G O CV219 EXO@ CV2 EXO@ CV5 EXO@ CV8 EXO@
DGPU_HOLD_RST#(GPIO191) 3 1
RV4
SN74AHC1G08DCKR_SC70-5 100K_0402_5%
D DIS@ D
2 0.22U 16V 7K 0.22U 16V 7K 0.22U 16V 7K 0.22U 16V 7K
SE00000R700 SE00000R700 SE00000R700 SE00000R700
Co
Compal Electronics, Inc.mpal Electronics, Inc.mpal Electronics, Inc.
Co
Co
Sec Compal Secret Datampal Secret Datampal Secret Data Co
Security Classificationurity Classificationurity Classification
Sec
2016/
Ti Ti
2016/07/3107/3107/31
2015/07/0907/0907/09
2015/
Is Is Issued Datesued Datesued Date 2015/ Deciphered Dateiphered Dateiphered Date 2016/ Titletletle
Dec
Dec
EXO
EXO
EXO/MESO_PCIE/DP/MESO_PCIE/DP/MESO_PCIE/DP
TH
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TH
Do
Do
Revvv
Re
AN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DD TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DD TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AN Si Si Sizezeze Document Numbercument Numbercument Number Re
1. 1.
LA
LA-D071P-D071P-D071P
DE Customstomstom 1.0(A00)0(A00)0(A00)
Cu
DE
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Cu
MA LA
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.Y BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.Y BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MA
Sh
Da T T Thursday, July 09, 2015hursday, July 09, 2015hursday, July 09, 2015 Sh Sheeteeteet 56 56 56 of of of 64 64 64
Da
Date:te:te:
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