Page 280 - Programmable Logic Controllers, Fifth Edition - Mobile version
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Outputs                                     0        L2
                                          7  6  5  4  3  2  1  0
                                                                                              1
                                       1                          0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1
                                                                                             2
                                       2                          0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0  3
                                       3                          0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0  4
                                                                                             5
                                       4                          0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0
                                Position                                                     6
                                       5                          0 0 0 0 0 0 0 0 1 1 1 0 0 1 1 1
                                                                                             7
                                       6                          0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0  8  Output module
                                       7                          0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0  9  at position 1
                                                                                             10
                                       8                          0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1
                                                                                             11
                                         Indicates that output is energized  Sequencer output file words
                                                                                             12
                                              Matrix-style chart
                                                                                             13
                                                                                             14
                                                                                             15
                                Figure 12-13  Sequencer chart.



                                                                           An example of a time-driven sequencer program
                                                                         in which the time interval between sequencer steps is
                                                                         always a constant set value is shown in Figure 12-17.
                            Ladder logic program         Outputs         The operation of the program can be summarized as
                                                                   L2
                    T4:1/DN  SQO                                         follows:
                           SEQUENCER OUTPUT     EN      North/South        •  The preset time of timer T4:0 is set for 3 seconds.
                           File          #N7:0  DN
                           Mask          00FFh        O:2/0                •  The settings of the output bits for each sequencer
                           Dest            O:2                               position are entered and stored in bit file #B3:0.
                           Control        R6:0        O:2/1
                           Length            4                             •  The timer is started by the closing switch SW and
                           Position          0                               3 seconds later the timer done bit is set to 1.
                                                      O:2/2                •  As a result the timer done bit increments the
                           SQO                                               SQO instruction to the next position and resets
                           SEQUENCER OUTPUT     EN                           the timer.
                           File          #N7:10  DN      East/West
                           Mask          00FFh                             •  The destination is O:2 and all 16 bits of this word
                           Dest        T4:1.PRE       O:2/4                  are used for outputs.
                           Control        R6:0
                           Length           4                              •  The mask is FFFF hexadecimal or 1111111111111111
                           Position         0         O:2/5                  binary, which allows all 16 bits to pass through.
                                                                           •  As long as input SW is closed the program contin-
                    T4:1/DN  TON                      O:2/6                  ues operating with 3 seconds between sequencer
                           TIMER ON DELAY       EN                           steps.
                           Timer           T4:1
                           Time base        1.0  DN
                           Preset           25
                           Accumulated       0




                                         Timing chart
                   N/S            Red              Green      Yellow
                   E/W      Green      Yellow           Red
                            25 s        5 s        25 s        5 s
                                                                         Figure 12-15  Sequencer file #N7:0 light cycle settings.
                   Figure 12-14  Time-driven sequencer output program.   Source: Courtesy of TheLearningPit



                                                                     Sequencer and Shift Register Instructions  Chapter 12  261







          pet73842_ch12_252-280.indd   261                                                                              03/11/15   7:19 PM
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