Page 284 - Programmable Logic Controllers, Fifth Edition - Mobile version

Ladder logic program
L1 Inputs PB1 SQL

SEQUENCER LOAD EN
PB1 Source File #N7:20
word I:2 Source I:2 DN
Control R6:22
0
Length 5
1 Position 3
2
3
4 Source word I:2
5 15 0
6 00 00 10 10 11 00 11 01 Source
I:2
7
8
9 Destination file #N7:20
10 Word 15 0
11 N70:20 0
12
13 21 1
14 22 2
15 23 00 00 10 10 11 00 11 01 3
24 4 Current
Cam (on machine) 25 5 step
Operating
force

Limit switch
Figure 12-20 Sequencer load (SQL) instruction program.

Figure 12-21 illustrates the basic concept of a shift You can program a shift register to shift status data
register. A shift pulse or clock causes each bit in the either right or left, as illustrated in Figure 12-22, by shift-
shift register to move 1 position to the right. At some ing either status or values through data files. When you
point, the number of data bits fed into the shift register want to track parts on a status basis, use bit shift registers.
will exceed the register’s storage capacity. When this Bit shift instructions will shift bit status from a source bit
happens, the first data bits fed into the shift register by address, through a data file, and out to an unload bit, one bit
the shift pulse are lost at the end of the shift register. at a time. There are two bit shift instructions: bit shift left
Typically, data in the shift register could represent the (BSL), which shifts bit status from a lower address number
following: to a higher address number through a data file, and bit shift
• Part types, quality, and size right (BSR), which shifts data from a higher address num-
• The presence or absence of parts ber to a lower address number through a data file. Some
PLCs provide a circulating shift register function, which
• The order in which events occur allows you to repeat a pattern again and again.
• Identification numbers or locations When working with a bit shift register, you can iden-
• A fault condition that caused a shutdown tify each bit by its position in the register. Therefore,

Sequencer and Shift Register Instructions Chapter 12 265

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