Page 297 - Programmable Logic Controllers, Fifth Edition - Mobile version

Output 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
O:2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Positions
B3:0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Start
B3:1 1 1 0 1 1 0 1 1 0 1 1 0 0 0 1 1 Step 1
B3:2 0 0 1 0 0 1 0 0 1 0 0 1 1 1 0 0 Step 2

B3:3 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Step 3
B3:4 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 Step 4
Figure 12-41 Sequencer file for Problem 2.

lights PL1 through PL16. State the status of each 3. Answer each of the following with reference to the
light for steps 1 through 4. timer-driven sequencer program shown in Figure 12-42:
b. Which output bit addresses could be masked and a. How many bit outputs are controlled by this
which could not? Why or why not? sequencer?
c. State the status of each bit of output word O:2 for b. What is the address of the word that controls the
step 3 of the sequencer cycle. outputs?

Ladder logic program Outputs
L2
T4:1/DN
SQO North/South
SEQUENCER OUTPUT EN
File #N7:0 O:2/0
Mask 0077h DN
Dest O:2 O:2/1
Control R6:0
Length 4
Position 0 O:2/2

SQO East/West
SEQUENCER OUTPUT EN
File #N7:10 O:2/4
Mask 00FFh DN
Dest T4:1.PRE O:2/5
Control R6:0
Length 4
Position 0 O:2/6

T4:1/DN TON
TIMER ON DELAY EN
Timer T4:1
Time base 1.0 DN
Preset 25
Accumulated 0

Integer Table Integer Table
Value 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
N7:10 0 N7:0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
N7:11 25 N7:1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1
N7:12 5 N7:2 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1
N7:13 25 N7:3 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0
N7:14 5 N7:4 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0
Radix Decimal Radix Binary Table: N7:Integer

Figure 12-42 Timer-driven sequencer program for Problem 3.

278 Chapter 12 Sequencer and Shift Register Instructions

pet73842_ch12_252-280.indd 278 03/11/15 7:20 PM