Page 20 - Multipath MIPS

Blocked Multithreading

 Blocking Threads 1 123
Time (Processor cycles) Thread
 might stall the processor due to Threads

latency events Time (Processor cycles)

 Hide latency by suspending the 1 1

execution of a thread and switching 1 1

to another Latency Context
1 2 switch
 Static[Rhamma] – (cons. & pros)
2
 Explicit-switch (instruction/tagging)
 Implicit-switch (instruction class: 2

switch-on-[load/store/branch]

 Dynamic[Sparcle/Alewife/Rhamma]

 Switch-on-[cache-miss/signal]

 Switch-on-use[lazy on-load/cache]

 Conditional-Switch

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