Page 6 - Multipath MIPS
P. 6

Pipelining: overlap the execution of multiple instructions

       Break down the execution of instructions into a number of sub-stages
       Each stage typically advance with each processor cycle

       Goal of pipelining is to increase the instruction throughput

          typically measured in Cycle Per Instruction (CPI)
       Perfect case: speedup = depth of pipeline

          (imbalance/hazards/overhead)

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