Page 40 - Z270X-Gaming 7
P. 40
GA-Z270X-GAMING 7 Signals
CPU PCH SIO DDR4
(1151) (Z270) (IT8686E)
-PVIDALRT N_-SLP_S3 N_-SLP_S3 N_SMBDATA
PVIDSLCK N_-S4_S5 N_-S4_S5 N_SMBCLK
PVIDSOUT O_PWRBTSW -PWRBTSW
A_-PROCHOT N_LAD0~3 O_PWRBTSW
N_SMBDATA
A_PECI N_SMBCLK N_LAD0~3
A_-THRMTRIP N_SERIRQ N_A20GATE
N_-LDRQ0
DDR_VTT_CTL N_-LDRQ0 N_SERIRQ
N_AZCPU_SDOUT N_-LFRAME N_-LFRAME
A_AZ_CPU_SDI N_-LPCPME N_-LPCPME
N_-PCIE_WAKE
N_AZCPU_SCLK N_-THRMTRIP VIN0~VIN6
A_DMI_0~3RXP/N N_ICH_SPI_MOSI CEB_N
A_DMI_0~3TXP/N N_ICH_SPI_MISO A_PECI
VREF_CAB N_-ICH_SPI_CS A_-PROCHOT
VREF_DQB N_ICH_SPI_CLK N_-THRMTRIP
N_SPI_DQ2
VCCGT_SENSE N_SPI_DQ3 VCCIO_EN
VSSGT_SENSE N_AZCPU_SDOUT VCCSA_EN
VCORE_VCC_SENSE A_AZ_CPU_SDI VCC1_0_EN
VCORE_VSS_SENSE N_AZCPU_SCLK VPP25_EN_IO
MA_EN
N_PCH_CPU_TI A_DMI_0~3RXP/N VR_RDY
A_DMI_0~3TXP/N
N_PCH_CPU_TO N_CPU_S -PSON
A_PMDOWN N_CPU_S1 JP2~5
A_-SKTOCC N_GT_S -SPI_HOLD_M
A_PMSYNC N_DEVSLP0,2,4 -SPI_HOLD_B
N_-LAN_WAKE ERP-LANWAKE
N_SUSCLK_MCU MB_ID2
A_PMDOWN
A_-SKTOCC ECIO_SMBDATA
A_PMSYNC ECIO_SMBCLK
B_SW
Dept : #41B研發服務部 By: