Page 338 - FUNDAMENTALS OF COMPUTER

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338 Fundamentals of Computers NPP

if the voltage is high, a ‘1’ is stored and if the VwbZmË_H$ ê$n go A{YH$ ñWmZ KoaVm h¡Ÿ& AV… SRAM
voltage is low, a ‘0’ is stored. One flip-flop oc-
cupies relatively larger area within the chip. H$m KZËd H$_ hmoVm h¡Ÿ& SRAM Vrd« _o_moar hmoVr h¡
Therefore packing density of static RAM is Š`m|{H$ BZH$m EŠgog Q>mB©_ ~hþV H$_ hmoVm h¡ Ÿ& BZH$s
small. But access time of static RAM is low. H$s_V ~hþV A{YH$ hmoVr h¡Ÿ& BZ_| A{YH$ _mÌm _| epŠV
Therefore SRAM is a very fast memory. SRAM
are very costly but easier to use. Their power D$î_m Ho$ ê$n _| {ZH$bVr h¡ &
dissipation is large.
Dynamic RAM S>m`Zm{_H$ ao_ (DRAM)
The information in a Dynamic RAM is Bg_| Amdoe Ho$ ê$n _| OmZH$mar g§J«hrV hmoVr h¡ Ÿ&
stored in the form of a charge which is dynamic `h Amdoe EH$ g§Ym[aÌ _| hmoVm h¡Ÿ& `h g§Ym[aÌ
electrical quantity. The charge is stored in a ca- MOSFET (Metal Oxide Semiconductor Field
pacitor which is formed by a MOSFET (Metal
Oxide Semiconductor Field Effect Transistor). Effect Transistor) go ~Zm hmoVm h¡Ÿ& EH$ MOSFET H$s
The complete unit of a MOSFET and capacitor nyar BH$mB© VWm H¡$no{gQ>a H$mo gob H$hVo h¡& gob _| Amdoe
is called cell. The presence of charge in the MOS H$s CnpñW{V '1' VWm AZwnpñW{V '0' Xem©Vr h¡ & EH$
cell may represent “1” and the absence of charge MOS gob {Mn _| ~hþV H$_ ñWmZ KoaVr h¡& Bg àH$ma
in the cell may represent ‘0’. A MOS cell occu- EH$ N>moQ>r {Mn ‘| Eogr goëg H$s ~‹S>r g§»¶m hmo gH$Vr
pies a small area within the chip. Thus, a small h¡& AV… DRAM H$m KZËd ~hþV A{YH$ hmoVm h¡Ÿ& BZH$s
chip may contain large number of such cells.
Therefore packing density of a DRAM is large. H$s_V ~hþV H$_ hmoVr h¡ & bo{H$Z `o Yr_r J{V go H$m`©
Another advantage of a DRAM is that it is inex- H$aVr h¡Ÿ& BgHo$ gmW EH$ g_ñ`m `h hmoVr h¡ {H$ Amdoe
pensive as compared to SRAM. But its access Wmo‹S>r hr Xoa _| brH$ hmo OmVm h¡Ÿ& AV… EH$ Eogo n[anW
time is large as compared to SRAM, that means H$s Amdí`H$Vm hmoVr h¡ Omo DRAM H$mo ~ma-~ma n‹T>o
DRAM are slower. Another problem with DRAM Am¡a Cgr H$mo [aMmO© H$a| & Eogo n[anW H$mo [a\«o$qeJ
is that the stored charge leaks within few milli-
seconds. Therefore each DRAM must have a n[anW H$hVo h¡Ÿ& `h Wmo‹S>o-Wmo‹S>o {_brgoH§$S> _| DRAM
circuit which is capable of reading the contents H$mo {\$a go Amdo{eV H$aVm ahVm h¡Ÿ& H$^r-H$^r Bgo
of the DRAM and recharge (Refresh) the same. DRAM H$s {Mn na hr ~Zm {X`m OmVm h¡ & Bg Vah
Such a circuit is called refreshing circuit. A re- H$s DRAM {Mn H$mo iRAM (Integrated RAM)
freshing circuit charges the DRAM every few H$hVo h¢ & BZ_| H$_ epŠV IM© hmoVr h¡& Bg g{H©$Q> Ho$
milliseconds. The IC available for refreshing cir-
cuit is called DRAM controller. Sometimes the {cE CncãY IC H$mo DRAM H$ÊQ´>moca H$hVo h¢Ÿ& H$^r-
controller circuit is in-built in the chip itself. H$^r H$ÊQ´>moca g{H©$Q> ñd`§ {Mn _| BZ-{~ëQ> hmoVm h¡Ÿ&
Such a DRAM chip is called iRAM (Integrated) Eogr DRAM {Mn H$mo iRAM (BÝQ>rJ«oQ>oS>) `m Šdmgr-
or Quasi-staticRAM or Pseodo-static RAM. ñQ>o{Q>H$ RAM `m ñ`yS>mo ñQ>o{Q>H$ RAM H$hVo h¢Ÿ&
Since DRAM uses MOSFET Technology, My±{H$ DRAM Ûmam MOSFET VH$ZrH$ H$m Cn`moJ
their power consumption is very small as com- {H$`m OmVm h¡ Bg{cE SRAM H$s VwcZm _| CZH$m nm°da
pared to SRAM. Because of their low cost, higher H§$OåneZ ~hþV H$_ hmoVm h¡Ÿ& H$_ cmJV, hm`a n¡Ho$qOJ
packing density and small power consumption S>opÝgQ>r VWm H$_ nm°da H§$OåneZ Ho$ H$maU DRAM
DRAM are extensively used in computers. H$åß`yQ>a _| ~hþVm`V go Cn`moJ H$s OmVr h¡Ÿ&