Page 393 - FUNDAMENTALS OF COMPUTER

NPP

NPP CPU Architecture, Addressing Modes and Data Transfer Schemes 393

fault segment register is DS. r can not be seg- {H$`m OmVm h¡& {S>\$m°ëQ> goJ_oÝQ> a{OñQ>a DS h¡& r goJ_oÝQ>
ment register.
a{OñQ>a Zht hmo gH$Vm h¡&
 ADD [BX], AH: Contents of AH are added · ADD [BX], AH: AH Ho$ H$ÝQ>oÝQ²>g {\${OH$c _o_moar
to physical memory location (BX) + (DS) cmoHo$eZ (BX) + (DS) × 16 _| Omo‹S>o OmVo h¢&
× 16.

 Add [3041], AX: 16-bit memory word · Add [3041], AX: S>mQ>m goJ_oÝQ> _| 3041 VWm
placed at 3041 and 3042 in data segment 3042 na aIr J`r 16 {~Q> _o_moar dS>© H$mo AX Ho$
will be added to contents AX and the result H$ÝQ>oÝQ²>g _| Omo‹S>m Om`oJm VWm n[aUm_ S>mQ>m goJ_oÝQ>
will be placed at 3041 and 3042 in Data _| 3041 VWm 3042 na aIm Om`oJm&
segment.
ADD r, m: Contents of 8-bit or 16-bit reg- ADD r, m: 8 {~Q> `m 16 {~Q> a{OñQ>a Ho$ H$ÝQ>oÝQ²>g
ister added to contents of specified memory {ZYm©[aV _o_moar Ho$ H$ÝQ>oÝQ²>g _| Omo‹S>o OmVo h¢ VWm n[aUm_
location and result is placed in the register. r H$mo a{OñQ>a _| aIm OmVm h¡& r goJ_oÝQ> a{OñQ>a Zht hmo
cannot be segment register.
gH$Vm h¡&
ADD r, data: This instruction uses imme- ADD r, data: `h BÝñQ´>ŠeZ B{_{OEQ> ES´>oqgJ _moS>
diate addressing mode. The specified data will H$m Cn`moJ H$aVm h¡& {ZYm©[aV S>mQ>m {ZYm©[aV a{OñQ>a _|
be loaded in the specified register. Register r cmoS> {H$`m Om`oJm& a{OñQ>a r goJ_oÝQ> a{OñQ>a Zht hmo
can not be Segment register.
gH$Vm h¡&
e.g. ADD DL, 6AH
ADD AX, 40FFH
ADD m, data: Specified Data is loaded into ADD m, data: {ZYm©[aV S>mQ>m H$mo {ZYm©[aV a{OñQ>a
specified register. The memory can store one or _| cmoS> {H$`m OmVm h¡& _o_moar EH$ `m Xmo ~mBQ²>g ñQ>moa H$a
two bytes depending upon the size of data gH$Vr h¡, Omo {ZYm©[aV S>mQ>m Ho$ AmH$ma na {Z^©a H$aVm h¡&
specified.
e.g. ADD [BX], A6H
add the contents of BX in Data Segment to BX Ho$ H$ÝQ>oÝQ²>g H$mo 8 {~Q> S>mQ>m A6H Ho$ S>mQ>m
the 8-bit adata A6H and place the result in goJ_oÝQ> _| Omo‹S>| VWm n[aUm_ H$mo Cgr _o_moar cmoHo$eZ _|
same memory location.
aI|&
ADD [BX], 4152H
add the specified 16-bit data 4152H with {ZYm©[aV 16 {~Q> S>mQ>m 4152H H$mo S>mQ>m goJ_oÝQ> _|
the 16-bit number stored at BX and BX+1 in BX VWm BX + 1 na g§J«{hV 16 {~Q> g§»`m go Omo‹S>|&
data segment. The result is placed in two con-
secutive memory locations [BX] and [BX+1] in n[aUm_ H$mo S>mQ>m goJ_oÝQ> _| Xmo H§$OrŠ`y{Q>d _o_moar cmoHo$eÝg
data segment. _| aIm OmVm h¡&
ADC r , r Add with carry: This instruc- ADC r , r ES> {dX Ho$ar: `h BÝñQ´>ŠeZ ADD Ho$
1
2
1
2
tion is similar to ADD but CF (carry Flag) is also g_mZ hr h¡ {H$ÝVw CF (Ho$ar âcoJ) ^r Omo‹S>m OmVm h¡&
added.