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NPP
NPP CPU Architecture, Addressing Modes and Data Transfer Schemes 397
will be executed as follows: {ZåZ{b{IV àH$ma go E³Or³¶yQ> {H$¶m Om¶oJm…
(DX) (AX) (CX) * (AX)
MUL m: Multiply contents of memory m MUL m: S>mQ>m goJ_oÝQ> _| _o_moar m Ho$ H$ÝQ>oÝQ²>g
in data segment to the contents of (AL) or (AX). H$mo AL `m AX Ho$ H$ÝQ>oÝQ²>g go JwUm H$aVm h¡& MUL r Ho$
Same as MUL r.
g_mZ&
IMUL r / IMUL m: Signed multiplication, IMUL r / IMUL m: gmBÝS> _ëQ>rpßcHo$eZ,
execution is similar to MUL instruction EŠOrŠ`yeZ MUL BÝñQ´>ŠeZ Ho$ g_mZ hmoVm h¡&
DIV r: Unsigned division. Operand is a 8- DIV r: AZgmBÝS> {S>drOZ/Am°naoÝS> EH$ 8 {~Q> `m
bit or 16-bit register which works as a divisor. 16 {~Q> a{OñQ>a hmoVm h¡ Omo EH$ {S>dm`Oa Ho$ ê$n _| H$m`©
The dividend is implied and it is not specified H$aVm h¡& {S>{dS>oÝS> H$mo à`wŠV {H$`m OmVm h¡ VWm Bgo
in the instruction.
BÝñQ´>ŠeZ _| {ZYm©[aV Zht {H$`m OmVm h¡&
If an 8-bit register is specified a 16/8 · `{X EH$ 8-{~Q> a{OñQ>a {ZYm©[aV {H$`m OmVm h¡
division is performed. The 16-bit dividend is Vmo 16/8 {S>drOZ gånÝZ {H$`m OmVm h¡& 16 {~Q> {S>{dS>oÝS>
implied and it resides in AX.
à`wŠV {H$`m OmVm h¡ VWm `h AX _| ahVm h¡&
e.g. DIV BH
This instruction will be executed as fol- `h BÝñQ´>ŠeZ {ZåZ àH$ma go EŠOrŠ`yQ> {H$`m Om`oJm:
lows:
(AX) ÷ (BH) → (AX)
AH holds remainder and AL holds Quo- AH [a_oÝS>a H$mo aIVm h¡ VWm AL H$moeoÝQ> H$mo aIVm h¡&
tient.
If a 16-bit register is specified a 32/16, · `{X EH$ 16 {~Q> a{OñQ>a {ZYm©[aV {H$`m OmVm h¡
unsigned division is performed. e.g. DIV BX Vmo 32/16 AZgmBÝS> {S>drOZ gånÝZ {H$`m OmVm h¡&
will be executed as follows: CXmhaU Ho$ {cE, DIV BX {ZåZ àH$ma go EŠOrŠ`yQ> hmoJm:
[DX ] [AX ]
( )BX
Remainder = DX eof’$b = DX
Quotient = AX ^mJ’$b = AX
DIV m: Same as DIV r except that the di- DIV m: DIV r Ho$ g_mZ hr h¡ AÝVa `h h¡ {H$
visor is a memory m in data segment. If an 8- {S>dm`Oa S>mQ>m goJ_oÝQ> _| EH$ _o_moar m h¡& `{X EH$ 8
bit is pointed by memory it is a 16/8 division. {~Q> H$mo _o_moar Ûmam B§{JV {H$`m OmVm h¡ Vmo `h EH$ 16/
If a 16-bit is pointed by memory it is a 32/16 8 {S>drOZ h¡& `{X EH$ 16 {~Q> H$mo _o_moar Ûmam B§{JV
division. Assembler directive can be used to {H$`m OmVm h¡ Vmo `h EH$ 32/16 {S>drOZ h¡& Agoå~ca
indicate whether it is a one byte memory op- S>mBaopŠQ>d H$m `h g§Ho$V H$aZo Ho$ {cE Cn`moJ {H$`m Om
erand or two Byte memory operand e.g. gH$Vm h¡ {H$ Š`m `h EH$ dZ ~mBQ> _o_moar Am°naoÝS> h¡ `m
Xmo ~mBQ> _o_moar Am°naoÝS> h¡& CXmhaU:
DIV BYTE PTR [BX]
DIV WORD PTR [BX]