Page 32 - UNI 101 Computer Science Handout.
P. 32

Faculty of Nursing
                                                                  Adult care Nursing Department



                                            Figure 5  Major PC System Components


              A clock controls the operation of the CPU. Interrupt and direct memory access (DMA) capabilities are
             provided to enable rapid and efficient I/O processing. L1 and L2 cache memory for each CPU is included

             within the same integrated circuit as the CPU for most modern processors. The wiring for the primary

             buses  that  interconnect  the  CPU  and  its  peripheral  components  is  printed  on  the  motherboard.

             Connectors on the motherboard combine with the frame of the case to hold the motherboard and plug-

             in peripheral cards in place, and, of course, the connectors on the motherboard provide the electrical
             connections between the peripherals and the buses. The main frame computer is packaged differently,

             since the mainframe computer is much larger physically, as well as operation ally. Still, the essential

             components and operations are similar to those of the personal computer.

























                                       Figure 6  The Components in a Typical Desktop PC


              Figure below illustrates the basic pathways required in a CPU-memory-I/O system. There are five basic
             components involved in the interfaces between the CPU, memory, and the I/O peripherals: 1. The CPU

             or CPUs. 2. The I/O peripheral devices. 3. Memory. Except for single pieces of input or output that can

             be transferred directly from a register, data from input or intended for output is normally stored at least

             temporarily  in  memory,  where  it  can  be  accessed  by  the  appropriate  program,  even  for  situations
             preferring programmed I/O. 4. I/O modules. The I/O modules act as interfaces between the CPU and

                                32                                                                        Academic Year 2025/2026
   27   28   29   30   31   32   33   34   35   36   37