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P. 558

UNIT 2
               MODULE 2: A C THEORY AND ELECTRONICS (cont’d)


                SPECIFIC OBJECTIVES                 EXPLANATORY NOTES          SUGGESTED  PRACTICAL
                                                                               ACTIVITIES

                Logic Gates (cont’d)

                Students should be able to:

                5.2.     use truth tables to represent                         Use    of   logic   tutors
                        the  function  of  logic  gates                        (combinations of logic gate
                        with  no  more  than  two                              chips  on  one  board)  to
                        inputs;                                                investigate the truth tables
                                                                               of these gates.

                5.3.     re-design  a  logic  circuit  to  Circuit should be reduced to
                        contain  only  NOR  gates  or  minimum chip count.
                        only NAND gates;

                5.4.     analyse   circuits   using
                        combinations  of  logic  gates
                        to perform control functions;

                5.5.     construct  truth  tables  for  a  Students  should  familiarise  Logic  tutor  can  be  used  to
                        combination of logic gates;   themselves  at  the  earliest  investigate    these
                                                    possible  opportunity  with  combinations.
                                                    the  application  of  logic
                                                    gates  to  solve  simple  real-
                                                    world   problems   and   a
                                                    familiar   practical example
                                                    should be described.

                5.6.     interpret  truth  tables  for  a
                        combination of logic gates;

                5.7.     use  timing  diagrams  to
                        represent  the  response  of
                        digital  circuits  to  different
                        input signals;

                5.8.     draw  a  circuit  to  show  the  From two NORs and an AND  Set up circuits to investigate
                        construction of a half-adder;  or from EXOR and an AND.   both the half adder and full
                                                                               adder.

                5.9.     explain  the  operations  of  a
                        half-adder;

                5.10.    use  two  half-adders  and  an
                        OR to construct a full-adder;




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