Page 257 - Mechatronics with Experiments
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MICROCONTROLLERS  243
                             VELR       16-bit   velocity estimation register

                             DFLTCON    8-bit   four noise filters on the three
                                        channels of the QEI and T5CKI pin: enable/disable.
                             PIR3       8-bit interrupt flag register;
                                          bit OC1IF for velocity update,
                                               IC2QEIF for position update,
                                               IC3QEIF for direction change.

                             INTCON     8-bit interrupt control register


                                  The QEI module is configured using the QEICON register (8-bit register). Bit settings
                             determine if x2 or x4 (quadrature) decoding is used. Using the phase angle relationship
                             between Channel A and B, the MFM module determines the direction of motion (forward
                             + or reverse -), and hence increments the position register (POSCNT) up or down. the
                             POSCNT register is reset to zero when it either overflows or reaches MAXCNT register
                             value ((QEICON<4:2>= 110 or 010), or on INDX signal if it was configured to do so
                             using QEICON register (QEICON<4:2>= 101 or 001).
                                  If the position counter reset interrupt is enabled, interrupt is generated (IC2QEIF flag
                             is set) on a reset of the POSCNT register when

                                1. the POSCNT register rolls over FFFFh to 0000h in period mode (QEICON<4:2>=
                                  110 or 010),
                                2. the MAXCNT register value is reached by the POSCNT register (QEICON<4:2>=
                                  110 or 010),
                                3. the INDX pulse is detected (QEICON<4:2>= 101 or 001).

                                  The POSCNT register resets to 00h if it was moving in a forward (+) direction from
                             which it continues to count up, and to FFh if it was moving in a reverse (-) direction from
                             which it continues to count down. In addition, the module can accurately estimate velocity
                             both at high speed and low speed and writes the velocity estimation to the VELR register
                             which the application program can access.
                                  The same pins are software configurable for input capture function using TIMER5:
                             CAP1/QEA, CAP2/EQB, CAP3/INDX.
                                  PIC 18F4431 supports 4-pairs (8 channels, 4 pairs where in each pair one channel
                             is a complement of the other channel) of PWM channels using a PWM module, at pins
                             PWM0-7. Each pair have independent PWM generators (independent PWM frequency and
                             pulse width). The PWM module can be configured for automatic dead-time insertion, edge
                             and center-aligned output modes, up to 14-bit resolution. PWM frequency can be changed
                             on-the-fly under software control.



                      4.5 PROBLEMS



                             1.  In the PIC 18F452 microcontroller, how is the RESET condition generated and what sequence
                             of events happens under that condition?
                             2.  What is the role of “watch dog timer”? How does it work in the PIC 18F452?
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