Page 72 - Handout Computer Network.

Figure 3 - 19 shown a Full - Duplex Transmission
https://www.youtube.com/watch?v=TIiQiw7fpsU

3.7.6 Ethernet Timing

Ethernet was designed to operate on a bus structure, which is a technical way to say
that every station always hears all messages at almost the exact same time. The official
designation is CSMA/CD. CSMA/CD can be interpreted simplistically to mean that when two
stations realize that they are talking at the same time, they are supposed to stop and wait a
polite amount of time before trying again. The basic rules and specifications for proper
operation of Ethernet are not particularly complicated, although some of the faster physical
layer implementations are becoming so.
Despite the basic simplicity, when a problem occurs in Ethernet, it is often quite
difficult to isolate the source of the problem. Because of the common bus architecture of
Ethernet (which can be described as a distributed single point of failure), the scope of the
problem is usually all stations within the collision domain that are attached to the segment.
When repeaters are used, this can include stations up to four segments away.

According to the rules, any station on an Ethernet network that wants to transmit a
message first listens to ensure that no other station currently is transmitting. If the cable is
quiet, the station begins transmitting immediately.
But because the electrical signal takes a small amount of time to travel down the cable
(called propagation delay), and each subsequent repeater encountered introduces a small
amount of latency in forwarding the frame from one port to the next, it is possible for more
than one station to begin transmitting at or near the same time. A collision then results.
If the attached station is operating in full duplex, the station can send and receive
simultaneously, and collisions should not be present. Full-duplex operation also changes the
timing considerations and eliminates the concept of slot time. Full-duplex operation allows for
larger network architecture designs because the timing restriction for collision detection is
removed. In half-duplex operation, assuming that a collision does not occur, the sending
station transmits 64 bits of timing synchronization information that often is known collectively
as the preamble.

The contents are as follows:

• Destination and source MAC addressing information

• Certain another header information

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