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Using Deep Learning to Configure Parallel Distributed Discrete-Event Simulators 41
Complexity Parameters that Capture the hardware/software Structure of a Parallel
Distributed Discrete-Event Simulator
Number of Global Nodes 4
Mean Local Nodes per Computer 1
STD Local Nodes per Computer 0
Mean Number of cores 1
STD Number of cores 0
Mean processor Speed 2.1
STD processor Speed 0.5
Mean RAM 6.5
STD RAM 1.9
Critical Path% 0.32
Theoretical Speedup 3
Local Events/(Local Events + External Events) 1
Subscribers/(Publishers + Subscribers) 0.5
Block or Scatter? 1
Table 4. TW has the minimum wall clock time for the aircraft detection problem
using 4 Global Nodes and 1 Local Node with Block
Time Management and Best (Minimum Wall Clock Time)
Synchronization Scheme
BTW 0
BTB 0
TW 1
Methodology
This is the methodology devised in order to recognize the best time management and
synchronization scheme for a PDDES problem. The input vector is define based on the
complexity and features of the software, hardware, and messaging of the PDDES
problem (as explained above). The output vector defines the best time management and
synchronization scheme (TW, BTW, BTB). This pattern matching is achieved using a
DBN trained with case studies performed by a Parallel Distributed Discrete-Event
Simulator. This methodology is depicted in Figure 9.