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NPP Number System, Boolean Algebra and Logic Circuits 185
This is the NAND-NAND Implementation `h A.B H$m NAND-NAND {H«$`mÝd`Z h¡&
of A.B.
Problem 3.38 àíZ 3.38
Implement the problem 3.37 with NOR- g_ñ`m 3.37 H$mo NOR-NOR H$s ghm`Vm go
NOR Gates: hb H$amo…
A
A.B
B
B
Solution: hc:
Now Convert AND Gate into bubbled AND JoQ> H$mo ~~ëS> AND JoQ> _| n[ad{V©V H$aZo
AND Gate. For this, put a bubble after A and to hoVw Ma am{e A Ho$ níMmV² EH$ NOT JoQ> VWm EH$ ~~b
cancel this bubble put a NOT Gate. The NOT bJmAmo, gmW hr B Ho$ níMmV² Ho$ NOT JoQ> H$mo ~~b
Gate after B can be drawn as bubble. Ho$ ê$n _| ~ZmAmo…
A
B A . B
Bubbled AND Gate can be replaced with ~~ëS> AND JoQ> Ho$ ñWmZ na NOR JoQ> ~Zm gH$Vo
NOR Gate: h¢…
A
B A . B
The NOT Gate is equivalent to Shorted NOT JoQ> Ho$ ñWmZ na em°Q>}S> NOR ~Zm gH$Vo h¢…
NOR.
A
B A.B
B .
This is NOR-NOR implementation of .A B . `hr A H$m NOR-NOR Bpåßb_|Q>oeZ h¡Ÿ&
Problem 3.39 àíZ 3.39
Perform NAND-NAND implementation {ZåZ ~y{b`Z \$bZ hoVw NAND-NAND H$s
of the following Boolean function: ghm`Vm go Vm{H©$H$ n[anW ~ZmAmo…
F = A.B + C
