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                  NPP                                    Memory                                    371


                   4.19 Memory Addressing Capability           4.19 grnr¶y H$s ‘o‘moar ES´>oqgJ H¡$no{~{bQ>r
                   of CPU

                      Today's CPU is available in the form of a   AmO Ho$ g‘¶ grnr¶y qgJb {Mn ‘| CnbãY h¡&
                  single chip. The  maximum amount of main    ‘oZ ‘o‘moar H$s A{YH$Va ‘mÌm grnr¶y {Mn na CnpñWV
                  memory  that can  be addressed  by the  CPU
                  depends on the number of address lines present  ES´>og bmBZm| H$s g§»¶m na AmYm[aV hmoVr h¡& CXmhaU
                  on the CPU chip. For example, if a small CPU  Ho$ {bE, EH$ N>moQ>o grnr¶y Ho$ nmg 8 ES´>og bmBÝg h¡&
                  chip  has 8 address lines, it can address 2 8  ¶h 2  =256 ~mBQ²>g h¡& AV… EH$ gm‘mݶ {Z¶‘mZwgma
                                                                  8
                  memory locations.  Therefore its memory ad-
                  dressing capability is 2  =256 Bytes. Thus, as a  ¶{X grnr¶y na ES´>og bmBZm| H$s g§»¶m  N h¡ BgH$s
                                      8
                  general rule, if N be the number of address line  ‘o‘moar ES´>oqgJ H¡$no{~{bQ>r 2 ~mBQ²>g h¡& CXmhaU Ho$
                                                                                    N
                  on a CPU its memory addressing capability is  {bE ‘mBH«$mo àmogoga 8085 ‘| 16 ES´>og bmBÝg h¡,
                  2  Bytes. For example, in microprocessor 8085
                   N
                                                                                        16
                  there are 16 address  lines; thus its  memory  CgH$s ‘o‘moar ES´>oqgJ H¡$no{~{bQ>r 2 ~mBQ²>g (64 Ho$~r)
                  addressing capability is 2  Bytes (64KB). For a  h¡& 32 ES´>og bmBÝg g{hV àmogoga hoVw ‘o‘moar H¡$no{gQ>r
                                        16
                  processor  with 32  address  lines the  memory  2 (4 Or~r) h¡& AV… ES´>og ~g ‘| {OVZo dm¶am| H$s
                                                               32
                  capacity is 2  (4GB). Thus, as number of wires
                             32
                  in the address bus is increased, the memory  g§»¶m ~‹T>Vr OmEJr, grnr¶y H$s ‘o‘moar H¡$no{gQ>r ^r ~‹T>
                  capacity of  a CPU also increased.   Following  Om§EJr& {ZåZ {MÌ ‘| AdYmaUm Xem©B© JB© h¡…
                  diagram depicts the concepts:


                                                                           MEMORY
                                      CPU           n address lines      (max. 2  locations)
                                                                              n



                                          Memory addressing Capacity of a CPU                       
                                              Review Questions


                   Q.1. Compare Primary and Secondary memory.
                        àm`_ar VWm goH$ÊS>ar _o_moar H$s VwcZm H$s{OEŸ&
                   Q.2. What is memory cell? How it is represented? Give different characteristics of memory cell.
                        _o_moar goc Š`m h¡? Bgo H¡$go àX{e©V {H$`m OmVm h¡? _o_moar goc H$s {d{^ÝZ {deofVmE± ~VmB`oŸ&
                   Q.3. Explain different types of Primary memory.
                        àm`_ar _o_moar Ho$ {d{^ÝZ àH$ma g_PmB`oŸ&
                   Q.4. Explain different types of ROM.
                        ROM Ho$ {d{^ÝZ àH$ma g_PmB`oŸ&
                   Q.5. Give difference between Static and Dynamic RAM.
                        ñQ>o{Q>H$ VWm S>m`Zm{_H$ RAM Ho$ ~rM AÝVa ~VmB`oŸ&
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