Page 380 - FUNDAMENTALS OF COMPUTER
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                     380                         Fundamentals of Computers                           NPP

                        It stands for "Complement Accumulator”.     AWm©V² ""H$m§ßcr_|Q> EŠ`yå`ycoQ>a'' Bg_| H$moB© Am°na|S>
                    No  operand  is specified  since it is  a part of  {ZYm©[aV Zht h¡ Š`m|{H$ `h Am°nH$moS> H$m hr EH$ {hñgm
                    opcode. Contents of Accumulator is to be oper-
                    ated up on.                                 h¡& EŠ`yå`ycoQ>a a{OñQ>a Ho$ A§Xa H$s g§»`m EH$ go ~‹T>oJrŸ&
                        Similarly consider following 8086 Instruc-  Bgr àH$ma go {ZåZ 8086 BÝñQ´>³eZ H$mo XoImo…
                    tion:
                                                           LAHF
                        It stands for "Load AH from Flag". It has no  AWm©V²  ''cmoS> AH \«$m°_ âcoJ'' Bg_| ^r H$moB©
                    operand. Low byte from flag is transferred into  Am°na|S> \$sëS>  Zht h¡&  âcoJ  a{OñQ>a H$s  cmo ~mB©Q>
                    register AH.
                                                                {ZH$cH$a a{OñQ>a AH _| H$m°nr hmo OmVr h¡&
                        In stack-organised computer all computa-    ñQ>oH$-Am°J}ZmBÁS> H$åß`yQ>g©  _|  JUZmË_H$ {ZX}e
                    tional instructions are  zero operand instruc-  eyÝ`- Am°na|S> (Am°na|S>-a{hV) hmoVo h¢ Ÿ& ñQ>oH$ Ho$ Xmo
                    tions. Two words from top  of  the  stack  are  D$nar eãXm| (g§»`mAm|) H$mo Bpåßb{gQ> ê$n go {b¶m OmVm
                    taken implicitly. Thus ADD, MUL, DIV etc. in
                    stack-organised computers use implied ad-   h¡&  Bg àH$ma ñQ>oH$ Am°J}ZmBÁS> H$åß`yQ>a _|  ADD,
                    dressing mode. All zero-Address  Instruction  MUL, DIV Am{X BåßcmB©S> ES´>oqgJ _moS> H$m Cn`moJ
                    use implied addressing mode.                H$aVo h¢& g^r Oramo-ES´>og BÝñQ´>³eZ BåßbmBS> ES´>oqgJ

                                                                ‘moS> H$m Cn¶moJ H$aVo h¢&
                                                 Instruction          Opcode

                                                  Opcode               datum

                    5.2.2  Immediate Addressing Mode            5.2.2 B_r{OEQ> ES´>oqgJ _moS>
                        The datum to be operated is in the instruc-  {Og g§»`m na {H«$`m H$aZm hmoVr h¡ dh g§»`m {ZX}e
                    tion itself. Consider the following 8086 Instruc-  _| hr {cIr OmVr h¡ Ÿ& O¡go {ZåZ 8086 Ho$ {ZX}e H$mo XoImo:
                    tion:

                                                         ADD  AH,  46H
                        In this instruction the source operand is an  CnamoŠV {ZX}e _| gmog© Am°naoÝS> EH$ 8-{~Q> S>oQ>‘
                    8-bit datum 46H. This is called Immediate op-  46H h¡Ÿ& Bgo hr B_r{OEQ> Am°na|S> H$hVo h¢Ÿ& Bg {ZX}e
                    erand. This datum is to be added with contents
                    of register AH and the results are placed in AH.  _| `h g§»`m AH Ho$ A§Xa H$s g§»`m Ho$ gmW Ow‹S> OmVr
                    Thus, source operand has immediate address-  h¡ d n[aUm_ AH _| Mcm OmVm h¡Ÿ& AV… gmog© Am°naoÝS>
                    ing mode. In  microprocessor  8085  following  ‘| B_r{OEQ> ES´>oqgJ _moS hmoVm >h¡Ÿ& _mBH«$moàmogoga 8085
                    instruction has Immediate addressing mode:  _| ^r B‘r{OEQ> ES´>oqgJ ‘moS> h¡Ÿ& O¡go…
                                                            ADI 46H
                        The second operand is implicit and it re-   Xygar g§»`m EŠ`yå`ycoQ>a Zm_H$ a{OñQ>a _| hmoVr
                    sides in Accumulator.  The source  operand  is
                    46H, which  is an  8- bit  datum or  immediate  h¡Ÿ& gmog©  Am°naoÝS>  46H h¡ Omo EH$ 8-{~Q> S>oQ>‘  ¶m
                    operand. Some examples are given for 8085 and  B‘r{OEQ> Am°naoÝS> h¡&  8085 VWm 8086 Ho$ Hw$N>
                    8086:                                       CXmhaU ZrMo {X`o JE h¢…
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