Page 417 - FUNDAMENTALS OF COMPUTER

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NPP CPU Architecture, Addressing Modes and Data Transfer Schemes 417

Q.6. Which of these is not a program control instruction:
BZ‘| go H$m¡Z àmoJ«m‘ H$ÊQ´>mob BÝñQ´>³eZ Zht h¡…
(a) LOOPZ (b) JNZ (c) MOV (d) None / H$moB© Zht
Q.7. Which of these is a data transfer instruction:
BZ‘| go H$m¡Z S>mQ>m Q´>mÝg’$a BÝñQ´>³eZ h¡…
(a) LOOPZ (b) JNZ (c) MOV (d) None / H$moB© Zht
Q.8. Which of these is a data manipulation instruction:
BZ‘| go H$m¡Z S>mQ>m ‘oZrnwboeZ BÝñQ´>³eZ h¡…
(a) LOOPZ (b) JNZ (c) IN (d) INR
Q.9. Which of these uses direct addressing mode:
BZ‘| go H$m¡Z S>m¶ao³Q> ES´>oqgJ ‘moS> H$m Cn¶moJ H$aVm h¡…
(a) LDA (b) MOV B, C (c) STAX (d) DCR
Q.10. Which of these uses register indirect addressing mode:
BZ‘| go H$m¡Z a{OñQ>a BZS>m¶ao³Q> ES´>oqgJ ‘moS> H$m Cn¶moJ H$aVm h¡…
(a) LDA (b) MOV B, C (c) STAX (d) DCR
Q.11. Which of these is an instruction of direct addressing mode in 8085:
BZ‘| go H$m¡Z 8085 ‘| S>m¶ao³Q> ES´>oqgJ ‘moS> H$m EH$ BÝñQ´>³eZ h¡…
(a) ADD B (b) INR A (c) IN 80H (d) None / H$moB© Zht
Q.12. Which of these is an instruction of Immediate addressing mode in 8085:
BZ‘| go H$m¡Z 8085 ‘| B{‘{OEQ> ES´>oqgJ ‘moS> H$m EH$ BÝñQ´>³eZ h¡…
(a) ADC B (b) INR A (c) IN 80H (d) None / H$moB© Zht
Q.13. Which of these belongs to Implied addressing mode:
BZ‘| go H$m¡Z BåßbmBS> ES´>oqgJ ‘moS> h¡…
(a) CMA (b) INR B (c) PUSH B (d) None / H$moB© Zht
Q.14. Which of the DMA is fastest:
H$m¡Z-gm DMA g~go VoO h¡…
(a) Cycle stealing mode / gm¶H$b ñQ>rqbJ ‘moS>
(b) Burst Mode / ~ñQ>© ‘moS>

(c) Can't say / H$h Zht gH$Vo
(d) Depends on Processor / àmogoga na {Z^©a H$aVm h¡
Q.15. Which of the following is faster programmed data transfer:
{ZåZ{b{IV ‘| go H$m¡Z A{YH$ Vrd« àmoJ«måS> S>mQ>m Q´>mÝg’$a h¡…
(a) Synchronous / {gÝH«$moZg (b) Asynchronous / E{gÝH«$moZg
(c) Interrupt-driven / BÝQ>aßQ> {S´>dZ (d) None of these / BZ‘| go H$moB© Zht