Page 95 - GIGABYTE Service Manual-v3.0-110101

5.4 No Boot & Post code 26, 2B, 2D

5.4.1 Post 26 Repair

(26)I/O port of 8042 is read. Going to initialize global data for turbo switch. Enable and

Initialize slot. Test protected mode exceptions. Enable A20 line. Verify/ Load NVRAM
parameters.
(2B)Toggle parity over. About to give control for any setup required before optional
video ROM check. Enable and Initialize slot. Initialize floppy drive and controller.

Screen memory test in-progress or failure.
(2D) Optional video ROM control is done. About to give control to do any processing
after video ROM returns control. Enable & initialize slot. Detect & initialize parallel
ports. Test timer 2. Screen retraces tests in-progress or failure.

In this step, system is going to initialize graphic function, and drive environment
information to memory. The defect for this section could be caused by graphic function
fail or memory issues.
Example: Intel

G31MX-S2 1.0 identified by:
01. Post code 26.
02. VCC3_DAC voltage no correct (must around 3V).
03. Q9 bad and swap ok.

Signal Explanation:
VCC3_DAC is display DAC analog supply voltage for GMCH. The voltage tolerance
should only be measured when the DAC is turned ON and at a stable resolution setting.
Any noise on the DAC during power on or display resolution changes do not impact the

circuit.
Repairing Notes:
VCC3_DAC voltage must be stable and not over 5% different of 3.3V. If the voltage
value is not in this range, it would cause no display or screen noise.

Figure 5-23: VCC3_DAC

73