Page 93 - GIGABYTE Service Manual-v3.0-110101
P. 93

Example: Intel

                   945GCMX-S2 identified by:
                   01. Post code C3-07.
                   02. LPC33 no clock.
                   03. C230 10P fail and swap ok.

                   P35C-DS3R identified by:
                   01. Post code C3-07.
                   02. LAD2 impedance low.
                   03. SB bad and swap ok.

                   Signal Explanation:
                   LPC bus include LAD0~3, LFRME, LRESET#,
                   LDRQ#, and clock LPC33, LPCCLK48
                   Repairing Notes:

                   Sometimes this issue is caused by I/O or SB chip badly,
                   But impedance ok. Try swap I/O first for this issue repair if impedance ok.












































                                        Figure 5-21: No Boot and Post code C3-07







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