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242 Fundamentals of Computers NPP
Implementation using Universal Gates `y{Zdg©b JoQ>m| go Båßbr_|Q>oeZ
It is easier and economical to use SOP form SOP go NAND Bpåßb_|Q>oeZ VWm POS go NOR
for NAND-NAND implementation and POS Bpåßb_|Q>oeZ H$aZm AmgmZ hmoVm h¡:
form for NOR-NOR implementation, consider
one by one:
(i) NAND-NAND Implementation: Consider (i) NAND-NAND Bpåßb_|Q>oeZ {ZåZ SOP ê$n H$mo
the SOP Form boZo na:
F = C . B . A + C . A + B . A + C . B
First use Basic gates to draw the logic cir- gd©àW_ _yb^yV JoQ>m| go n[anW ~ZmZo na …
cuit :
A B C
F
Convert all AND Gates into NAND and g^r AND JoQ>m| H$mo NAND JoQ>m| _| ~Xbm Om
therefore OR will be converted into bubbled OR. gH$Vm h¡ Ÿ& AV… OR ^r ~~ëS> OR _| ~Xb OmEJm- Bg
Each time we take SOP Form to get NAND- Vah SOP \$m°_© go ha ~ma VrZ {H«$`mAm| go NAND-
NAND implementation. The result will be ob- NAND Bpåßb_|Q>oeZ àmßV {H$`m Om gH$Vm h¡:
tained in three steps:
(1) Draw the basic logic circuit. (1) _yb^yV JoQ>m| H$m n[anW ~ZmAmoŸ&
(2) Convert AND into NAND. Bubbled OR is (2) AND JoQ>m| H$mo NAND JoQ>m| _| ~XbmoŸ& ñdV…
automatically obtained. Bubbled OR àmßV hmoJm Ÿ&
(3) Convert NOT into shorted NAND, (3) NOT H$mo em°Q>}S> NAND _| VWm ~~ëS> OR H$mo
bubbled OR into NAND. NAND JoQ> _| ~Xbmo &