Page 386 - FUNDAMENTALS OF COMPUTER
P. 386

NPP













                   386                          Fundamentals of Computers                          NPP


                      It will cause addition of contents of pro-  Bggo  R  VWm  R  Ho$ H§$Q>|Q> H$m `moJ hmoJm VWm
                                                                               3
                                                                        2
                  cessor register R  and R .  The result is placed  n[aUm_ R  _| OmEJmŸ& a{OñQ>a Q´>m§g\$a b¢½doO _| Bgo
                                 2
                                       3
                  in the register R . In register transfer language   1
                                1
                  it can be stated as:                        {ZåZmZwgma Xem© gH$Vo h¢:
                                                     R            R  + R 3
                                                                   2
                                                      1
                      The contents of R  and R  will remain un-   `hm± na R  d R  _| H$moB© n[adV©Z Zht hmoJmŸ& {ZåZ
                                            3
                                     2
                                                                              3
                                                                         2
                  changed. Following table gives three address  Vm{cH$m _| W«r  ES´>og BÝñQ´>³eÝg VWm  gå~pÝYV
                  instructions  and the  corresponding microo-
                  peration. A, B, C etc are supposed to be memory  _mBH«$moAm°naoeZ Xem©E JE h¢Ÿ& `hm± na A,B,C Am{X _o_moar
                  addresses.                                  ES´>og h¢:
                                             Instruction          Microoperation
                                             ADD R , A, B         R  ←  M[A] + M[B}
                                                    1
                                                                    1
                                             MUL R , C, D         R  ←  M[C] * M[D]
                                                                    1
                                                    1
                                                                           R 1
                                             DIV X, R , R 2       M[X] ←    R 2
                                                     1
                      The instruction ADD X, A, B is not allowed  {ZX}e: ADD  X, A,B Zht McoJm Š`m|{H$ gmog© VWm
                  because both source and destination cannot be  S>opñQ>ZoeZ XmoZm| _o_moar bmoHo$eZ Zht hmo gH$VoŸ& H$_ go H$_
                  memory locations. Atleast one register oper-
                  and is necessary.                           EH$ a{OñQ>a Am°na|S> Amdí`H$ h¡Ÿ&
                  2.  Two Address  Instructions               2. Xmo-ES´>og {ZX}e
                      This type of instruction has following for-  Bg àH$ma Ho$ {ZX}e H$m \$m°_}Q> Bg àH$ma hmoVm h¡:
                  mat:
                                                         Instruction

                                             Opcode    Operand 1   Operand 2
                      Normally operand 1 is  the  destination.    gm_mÝ`V: operand 1 S>opñQ>ZoeZ hmoVm h¡Ÿ& XmoZm|
                  Both the operands cannot be memory. If oper-  Am°naoÝS> ‘o‘moar Zht hmo gH$Vo h¢& `{X operand 2 S>mQ>m h¡
                  and 2 is a data, then operand1 can be a register  Vmo operand 1 a{OñQ>a `m _o_moar hmoJmŸ& {ZåZ CXmhaU
                  or memory. For example:
                                                              XoImo:
                                                         ADD   R , R 2
                                                                1
                      It means add contents of registers R  and   Bggo VmËn`© h¡ {H$ R  VWm R  H$s g§»`m H$mo Omo‹S>mo
                                                      1
                                                                                 1
                                                                                        2
                  R . The result is placed in the register R . In  VWm n[aUm_ R  _| S>mcmoŸ& a{OñQ>a Q´>m§g\$a b¢½doO _| Bg
                                                       1
                   2
                                                                         1
                  register transfer language this microoperation  {ZX}e H$mo {ZåZmZwgma {cIm OmEJm:
                  can be stated as:
                                                     R            R  + R 2
                                                      1
                                                                   1
                      Following table indicates different two op-  {ZåZ Q>o~c {d{^Þ Xmo-Am°na|S> {ZX}e VWm g§~§{YV
                  erand  instructions and  the corresponding  _mBH«$moAm°naoeZ H$mo Xem©Vr h¡:
                  microoperation:
   381   382   383   384   385   386   387   388   389   390   391