Page 102 - Handout of Computer Architecture (1)..
P. 102

Notes: A Two values separated by a slash refer to instruction and data caches. b Both caches are
                                                 instruction only; no data caches.
                                             Table 4.3 Cache Sizes of Some Processors

                   direct mapping the simplest technique, known as direct mapping, maps each block of main memory

                    into only one possible cache line.  The mapping is expressed as i=j modulo m where i=cache line
                      number j=main memory block number m=number of lines in the cache Figure 4.8a shows the
                   mapping for the first m blocks of main memory. Each block of main memory maps into one unique
                                               line of the cache. The next m blocks


























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