Page 138 - Handout Digital Electronics

Example of shift operation

Figure 67: serial in serial out shift register with loaded data bits 1101

Assume that a data word 1101 has been loaded in the shift register and is to be shifted out. Four clock
pulses will be needed to move all the four bits out of the register by shifting one bit at a time. To shift
the bits other data bits must be applied at the data in input line. It is encouraged to use zero (0) bits to
shift out the bits. If a 0 is applied to the D input of the FF0, the previous bit in FF0 will be shifted to
FF1, the previous bit in FF1 will be shifted to FF2 and the previous bit in FF2 will be shifted to FF3.
The previous bit in FF3 is lost to the out or collected. Successive application of the clock pulses and
zeros will operate in a similar way until all the data word bits have been shifted out of the register. The
illustration below shows how the shift occurs,

FF0 FF1 FF2 FF3

Initially 1 0 1 1

Pulse 1 0 1 0 1 previous bit (1) of FF3 is collected

Pulse 2 0 0 1 0 previous bit (1) of FF3 is collected

0 0
Pulse 3 0 1 previous bit (0) of FF3 is collected
Pulse 4 0 0 0 0 previous bit (1) of FF3 is collected

Figure 68: SISO shifts register operation

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