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18.5 Serial in parallel out (SIPO) register
The SIPO shift register allows data to be entered serially and output parallel (simultaneously). SIPO
shift register allows conversion from serial to parallel format. Data is loaded in the register serially as is
the case with SISO. Once the data is in the register, it may either be read out at each output
simultaneously, or it can be shifted out and replaced. (See figure 69). This register configuration has a
set (binary 1 control input signal) and a clear (binary 0 control signal). The Set control signal is used to
set to one of two modes of operation that is reading out at each output simultaneously or shifting the
output and replacing it
Figure 68: Serial in parallel out shift register
Assume that the data word 1101 is to be loaded as serial and output as parallel.
Figure 69: Serial in parallel out shift register operation.
Figure 689 shows one of the two modes of SIPO shift register operation. The above mode is also used
for error correction.
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