Page 313 - FUNDAMENTALS OF COMPUTER

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NPP Number System, Boolean Algebra and Logic Circuits 313

Note that in this circuit all logic gates have Ü`mZ X| {H$ Bg_| g^r 2-BZnwQ> dmbo JoQ> h¢Ÿ&
only two inputs.
Uses of Half Adders and Full Adders hm\$ ES>a d \w$b ES>a Ho$ Cn`moJ
Half Adders and full adders are used for hm\$ ES>a d \w$b ES>a H$åß`yQ>a _| {ZåZ n[anW
the following logic circuit design in the àXmZ H$aVo h¢…
computer system:
1. Binary Adder. 1. ~mBZar ES>a
2. Binary adder/subtractor. 2. ~mBZar ES>a/g~Q´>oŠQ>a
3. Binary subtractor. 3. ~mBZar g~Q´>oŠQ>a
4. 2’s Complement generator 4. 2’s H$m°påßb_|Q> OZaoQ>a

3.44 Binary Adder 3.44 ~mBZar ES>a
Binary Adder is a combinational logic `h EH$ Eogm Vm{H©$H$ n[anW hmoVm h¡ Omo Xmo ~mBZar
circuit which performs binary addition over g§»`mAm| H$m `moJ àXmZ H$aVm h¡Ÿ& _mZm {H$ h_| {ZåZ
two binary numbers. Consider two Binary
numbers to be added: Xmo g§»`mAm| H$m `moJ H$aZm h¡…
A 3 A 2 A 1 A 0
+ B 3 B 2 B 1 B 0

First A is added to B , thus a Half Adder g~go nhbo h_ A d B H$mo Omo‹S>|Jo AV… EH$ hm\$
o
0
0
0
is needed. Now, A , B and previous carry is to ES>a H$s Amdí`H$Vm hmoJrŸ& bo{H$Z AJbr ~ma A , B
1
1
1
be added. A full Adder is needed. Therefore VWm hm{gb H$mo Omo‹S>Zo hoVw \w$b ES>a H$s Amdí`H$Vm 1
after first pair of Bits we need full Adders. A 4- hmoJrŸ& AV… 4 {~Q>m| H$s Xmo g§»`mAm| H$mo Omo‹S>Zo hoVw EH$
bit Binary Adder can be drawn using one Half hm\$ ES>a VWm VrZ \w$b ES>a bJ|Jo {OZH$m n[anW
Adder and three full Adders. The circuit can be
drawn as: {ZåZmZwgma Xem©`m J`m h¡…
A3 A2 A1 A0
B3 B2 B1 B0

C3 C2 C1
F.A. F.A. F.A. H.A.

S4 S3 S2 S1 S0