Page 309 - FUNDAMENTALS OF COMPUTER

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NPP Number System, Boolean Algebra and Logic Circuits 309

will help in drawing the logic circuit of Half AmgmZr go H$s Om gH$Vr h¢Ÿ& Carry Ho$ ñV§^ H$mo gË`-
Adder. Consider the column for carry in the Vm{bH$m _| XoIZo na kmV hmoVm h¡ {H$ Carry = A.B.
truth table. It is product of A and B. Thus, an AV… EH$ AND JoQ> H$m AmCQ>nwQ> Carry àXmZ H$a
AND gate can be used to provide carry. As we gH$Vm h¡Ÿ& gmW hr My±{H$ XOR JoQ> H$m Cn`moJ `moJ àXmZ
know that XOR gate gives arithmetic sum of H$aZo Ho$ {b`o {H$`m OmVm h¡ Bg àH$ma EH$ hm\$ ES>a
inputs. Thus, a Half Adder logic circuit contains bm°{OH$ g{H©$Q> _| Xmo bm°{OH$ JoQ²>g AND VWm XOR
two logic gates AND and XOR.
hmoVo h¢Ÿ&

Thus, the functions for Sum and Carry can Sum VWm Carry Ho$ \$bZ Bg Vah go {bIo Om
be written as:
gH$Vo h¢:
Carry = A.B
Sum = .A B + B . A (in SOP Form)

Sum = (A+ B ) (A. + B ) (in POS Form)
The above expression for Half Adder can CnamoŠV g_rH$aUm| H$s ghm`Vm go hm\$ ES>a H$mo
be used to implement the logic circuit in NAND
gates or NOR gates only. NAND JoQ>m| `m NOR JoQ>m| H$s ghm`Vm go ~Zm`m Om
gH$Vm h¡Ÿ&
Problem 3.84 àíZ 3.84
Draw Half Adder using NOR-NOR gates hm\$ ES>a H$mo NOR-NOR JoQ>m| go ~ZmAmoŸ&
only.
Solution: hc:
As we know that the POS form is most POS ê$n H$mo boZo na NOR JoQ> go ~ZmZm AmgmZ
suitable to implement a Boolean expression in hmoVm h¡Ÿ& AV… {ZåZ g_rH$aU boZo na…
NOR-NOR gates. Thus, take POS Form:
Carry = A.B and Sum = (A+ B ) (A. + B )