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Figure 13.8 Example of VAX Instructions

               which is signaled by the pattern 00 in the leftmost 2 bits, leaving space for a 6-bit literal. Because of this
               exception, a total of 12 different addressing modes can be specified.

               An operand specifier often consists of just one byte, with the rightmost 4 bits specifying one of 16 general-
               purpose  registers.  The  length  of  the operand  specifier  can  be  extended  in  one  of  two ways.  First, a
               constant value of one or more bytes may immediately follow the first byte of the operand specifier. An
               example of this is the displacement mode, in which an 8-, 16-, or 32-bit displacement is used.

               Second, an index mode of addressing may be used. In this case, the first byte of the operand specifier
               consists of the 4-bit addressing mode code of 0100 and a 4-bit index register identifier. The remainder of
               the operand specifier consists of the base address specifier, which may itself be one or more bytes in
               length. The reader may be wondering, as the author did, what kind of instruction requires six operands.
               Surprisingly, the VAX has a number of such instructions. Consider

               ADDP6 OP1, OP2, OP3, OP4, OP5, OP6

               This instruction adds two packed decimal numbers. OP1 and OP2 specify the length and starting address
               of one decimal string; OP3 and OP4 specify a second string. These two strings are added and the result is
               stored in the decimal string whose length and starting location are specified by OP5 and OP6. The VAX
               instruction set provides for a wide variety of operations and addressing modes. This gives a programmer,
               such as a compiler writer, a very powerful and flexible tool for developing programs. In theory, this should
               lead to efficient machine- language compilations of high- level language programs and, in general, to
               effective  and  efficient  use  of  processor  resources.  The  penalty  to  be  paid  for  these  benefits  is  the


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