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increased complexity of the processor compared with a processor with a simpler instruction set and
format. We return to these matters in Chapter 15, where we examine the case for very simple instruction
sets.

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x86 AND ARM INSTRUCTION FORMATS

x86 Instruction Formats The x86 is equipped with a variety of instruction formats. Of the elements
described in this subsection, only the opcode field is always present. Figure 13.9 illustrates the general
instruction format. Instructions are made up of from zero to four optional instruction prefixes, a 1- or 2-
byte opcode, an optional address specifier (which con sists of the ModR/M byte and the Scale Index Base
byte) an optional displacement, and an optional immediate field

Figure 13.9 x86 Instruction Format
Let us first consider the prefix bytes:

■ Instruction prefixes: The instruction prefix, if present, consists of the LOCK prefix or one of the repeat
prefixes. The LOCK prefix is used to ensure exclusive use of shared memory in multiprocessor
environments. The repeat prefixes specify repeated operation of a string, which enables the x86 to
process strings much faster than with a regular software loop.

There are five different repeat prefixes: REP, REPE, REPZ, REPNE, and REPNZ. When the absolute REP
prefix is present, the operation specified in the instruction is executed repeatedly on successive elements
of the string; the number of repetitions is specified in register CX.

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