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MICROCONTROLLERS  225
                             hold the data and address for EEPROM. EECON1 and EECON2 registers control the access
                             to EEPROM.
                                  There are two addressing modes: direct addressing and indirect addressing.In direct
                             addressing mode, Bank Select Register (BSR which is at the FE0h address in the SFR
                             section of Bank 15 in data RAM) bits 3:0 (4-bits) are used to select one of 16 banks, and
                             the bits 11:4 (8-bits) from the opcode are used to select one of 256 memory locations in the
                             selected bank.

                             Instruction Set    The PIC 18Fxxx chip instruction set has 75 instructions (see PIC
                             18F452 or 18F4431 Users’ Manual for a list and description of the basic instruction set).
                             All, except three instructions, are 16-bit single word instructions. Three instructions are
                             double words (32-bit). Each instruction has a unique binary code. When the microcontroller
                             decodes the instruction code, the dedicated hardware circuit performs a function, such as
                             increment the value in accumulator, add two numbers, compare two numbers. An instruction
                             cycle is equal to four oscillator cycles. These four oscillator cycles per instruction cycle are
                             called Q1, Q2, Q3, and Q4 cycles. Therefore, if a 4 MHz oscillator is used, an instruction
                             cycle is 1 μs.
                                  Obtaining an instruction from the memory is called fetch. Decoding it to determine
                             what to do is called decode. And performing the operation of the instruction is called
                             execute. Each one of these fetch, decode, and execute phases of the instruction takes
                             one instruction cycle. The fetch–decode–execute cyles are pipelined, meaning executed in
                             parallel, so that each instruction executes in one instruction cycle. In other words, while one
                             instruction is decoding and executing, another instruction is fetched from the memory at
                             the same time. Single word instructions typically take one instruction cycle, and two-word
                             instructions take two instruction cycles to execute.
                                  The CPU understands only the binary codes of its instruction set. All programs must
                             ultimately be reduced to a collection of binary codes supported by its instruction set, spe-
                             cific to that microcontroller. However, it is clear that writing programs with binary codes
                             is very tedious. Assembly language is a collection of three to five characters that are used
                             as mnemonics corresponding to each instruction. Using assembly language instructions is
                             much easier than using binary code for instructions. The assembler is a program that con-
                             verts the assembly language code to the equivalent binary code (machine code) instructions
                             that can be understood by the CPU. At the assembly language level, the instructions can be
                             grouped into the following categories:

                                1. Data access and movement instructions used to read, write, and copy data between
                                  locations in the memory space. The memory space locations can be registers, RAM,
                                  or peripheral device registers. Examples of instructions in this category are: MOV,
                                  PUSH, POP.
                                2. Mathematical operations: add, subtract, multiply, increment, decrement, shift left,
                                  and shift right. Example instructions include ADDWF, SUBWF, MULWF, INCF,
                                  DECF, RLCF, RRCF.
                                3. Logic operations: such as AND, OR, inclusive OR. Example PIC 18F452 instructions
                                  include ANDWF, IORWF, XORWF.
                                4. Comparison operations: example instructions include CPFSEQ (=), CPFSGT (>),
                                  CPFSLF (<).
                                5. Program flow control instructions to change the order of program execution based on
                                  some logical conditions: GOTO, CALL, JUMP, RETURN.
                             In order to effectively use assembly language, one must very closely understand the hard-
                             ware and software architecture (pinout, bus, registers, addressing modes) of a particular
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