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252 Fundamentals of Computers NPP
Two quads overlap. Two don’t care condi- Xmo ŠdmS> EH$ Xygao na Amodabon H$a aho h¢Ÿ& BZgo
tions are assumed to be ‘1’ but the third is as-
sumed to be ‘0’. The SOP Form solution is {ZåZ SOP ì`§OH$ àmßV hmoJm: F = B + A
F = B + A
POS Form Solution POS ê$n
Consider the same K-map and use ‘0’ to POS ê$n _| àmßV H$aZo hoVw Cgr K-_on H$mo boH$a
make groups: 0 Ho$ J«wn ~ZmZo hm|Jo:
A B .C 00 01 11 10
0 1 1 x 1
1 1 x x 0
There is only one pair of ‘0’. the POS Form {g\©$ EH$ hr no`a h¡Ÿ& Bggo POS ê$n _| {ZåZmZwgma
solution is: ì`§OH$ àmßV hmoJm:
F = A + B
Note that it is same as SOP Form. But the ZmoQ> H$s{O`o {H$ `h SOP ê$n Ho$ O¡gm h¡Ÿ& na§Vw
difference is in its interpretation. It contains two BgHo$ B§Q>a{àQ>|eZ _| A§Va h¡Ÿ& Bg_| qgJc do[aE~c Ho$ Xmo
terms of single variable. But the POS Form con-
tains only one term of two variables. Q>åg© hmoVo h¢ O~{H$ POS ê$n _| Xmo do[aE~c H$m {g\©$ EH$
Q>_© hmoVm h¡Ÿ&
Implementation using Universal Gates `y{Zdg©b JoQ>m| H$s ghm`Vm go Bpåßb_|Q>oeZ
(i) NAND-NAND Implementation: Take (i) NAND-NAND _| ì`§OH$ H$m Bpåßb_|Q>oeZ H$aZo
SOP Form: F = A + B hoVw nhbo SOP ê$n boH$a _yb^yV JoQ>m| H$m n[anW
Draw logic circuit using Basic Gates: àmßV H$aVo h¢:
A
F
B
This is nothing but Bubbled OR gate and `hr ~~ëS> OR JoQ> h¡ Omo Eogo ^r Xem©`m Om gH$Vm h¡…
can be drawn as:
A
F
B