Page 409 - FUNDAMENTALS OF COMPUTER

NPP

NPP CPU Architecture, Addressing Modes and Data Transfer Schemes 409

AC AC + M[Y]
A popular example of this type of CPU is CPU Ho$ Bg àH$ma H$m EH$ cmoH${à` CXmhaU BÝQ>oc
microprocessor 8085 from Intel. Consider H$m _mBH«$moàmogoga 8085 h¡& 8085 go {ZåZ{c{IV
following Instructions from 8085: BÝñQ´>ŠeÝg H$m {dMma H$a|:
ADD B
SUB D
ANA H
ADI 42H
In all the instructions only one operand is g^r BÝñQ´>ŠeÝg _| Ho$dc EH$ Am°naoÝS> {ZYm©[aV
specified. Second operand resides in AC. The {H$`m J`m h¡& Xÿgam Am°naoÝS> AC _| ahVm h¡& Am°naoeÝg
result of the operations is placed in Accum- Ho$ n[aUm_ EŠ`y_wcoQ>a _| aIo OmVo h¢& O~{H$ S>mQ>m Q´>mÝg\$a
ulator. Although data transfer instruction may
have two opreand. e.g. MOV B, C. BÝñQ´>ŠeZ _| Xmo Am°naoÝS> hmo gH$Vo h¢& O¡go, MOV B, C
2. General Register Organisation 2. OZac a{OñQ>a Am°J}ZmBOoeZ

Two or three operand fields are specified Xmo `m VrZ Am°naoÝS> \$sëS²>g BÝñQ´>ŠeZ _| {ZYm©[aV
in the instruction. If three fields are specified, H$s OmVr h¢& `{X VrZ \$sëS²>g {ZYm©[aV H$s OmVr h¢ Vmo
then specified operation is performed on two {ZYm©[aV Am°naoeZ Xmo na gånÝZ {H$`m OmVm h¡ VWm
and the result is placed in the third operand.
n[aUm_ Vrgao Am°naoÝS> _| aIm OmVm h¡&
Consider following: {ZåZ{c{IV na {dMma H$a|:
MUL R1, R2, R3
This instruction would perform following `h BÝñQ´>ŠeZ {ZåZ{c{IV Am°naoeÝg gånÝZ H$aoJr:
operations:
R R × R 3
1
2
R is the destination register, R , R are R S>oñQ>rZoeZ a{OñQ>a h¡, R , R gmog© a{OñQ>g© h¢&
3
1
2
2
3
1
source registers. If one of the source registers is `{X S>oñQ>rZoeZ a{OñQ>a Ho$ ê$n _| Ho$dc Xmo Am°naoÝS²>g
used as a destination register only two oper-
ands may be specified: Cn`moJ {H$`o J`o h¢ Vmo Ho$dc Am°naoÝS²>g {ZYm©[aV {H$`o Om
gH$Vo h¢:
MUL R , R 2
1
would perform R R × R 2
1
1
Example of this type of CPU is Bg àH$ma Ho$ CPU H$m CXmhaU h¡:
Cyber 170: It has three register or two reg- gm`~a 170: Bg_| VrZ `m Xmo a{OñQ>g© VWm EH$
isters and one memory field operand. Consider _o_moar \$sëS> Am°naoÝS> hmoVm h¡& Hw$N> Am¡a CXmhaUm| na
few more examples:
MMm© H$aVo h¢:
MOV R1, R2
ADD R1, A
MUL X, R1, R2