Page 410 - FUNDAMENTALS OF COMPUTER

NPP

410 Fundamentals of Computers NPP

3. Stack Organisation 3. ñQ>¡H$ Am°J}ZmBOoeZ
In this organisation PUSH and POP in- Bg Am°J}ZmBOoeZ _| PUSH VWm POP BÝñQ´>ŠeÝg
struction are used for the data transfer: S>mQ>m Q´>mÝg\$a Ho$ {cE Cn`moJ {H$`o OmVo h¢:
PUSH A
Places a word at address A onto the stack. ñQ>¡H$ na ES´>og A na EH$ dS>© H$mo aIVm h¡& Bgr
Similarly a word may be retrieved using POP àH$ma EH$ dS>© H$mo POP BÝñQ´>ŠeZ H$m Cn`moJ H$aHo$ àmßV
instruction.
{H$`m Om gH$Vm h¡&
Computational-type instructions do not H$åß`yQ>oeZc-Q>mBn BÝñQ´>ŠeÝg _| {H$gr ES´>og \$sëS>
require any address fied. The operation is per- H$s Amdí`H$Vm Zht hmoVr h¡& Am°naoeZ H$mo ñQ>¡H$ AmBQ>åg
formed on top to stack items:
Ho$ Q>m°n na gånÝZ {H$`m OmVm h¡:
ADD
It is a zero-address instruction. Top two `h EH$ Oramo-ES´>og BÝñQ´>ŠeZ h¡& ñQ>¡H$ Ho$ Xmo Q>m°n
items of the stack would be added and the Am`Q>åg Omo‹S>o Om`|Jo VWm n[aUm_ ñQ>¡H$ Ho$ D$na aIm
result is placed on top of the stack. Similarly
MUL, SUB etc. can also be used without speci- Om`oJm& Bgr àH$ma MUL, SUB Am{X {H$gr Am°naoÝS> H$mo
fying any operand. {ZYm©[aV {H$`o {~Zm ^r Cn`moJ {H$`o Om gH$Vo h¢&

5.5 Data Transfer Schemes 5.5 S>mQ>m Q´>m§g\$a ñH$såg

5.5.1 Transfer of Information 5.5.1 BÝ’$m°‘}eZ H$m Q´>m§g’$a

In a computer system, following data EH$ H$åß`yQ>a àUmbr _| Bg àH$ma S>mQ>m Q´>m§g\$a
transfer may occur: hmoVm h¡…
1. Between CPU and Memory. 1. _o_moar VWm CPU Ho$ _Ü`&

2. CPU and IO Devices. 2. CPU VWm BZnwQ>-AmCQ>nwQ> `wpŠV`m| Ho$ _Ü`Ÿ&
3. IO devices and Memory. 3. BZnwQ>-AmCQ>nwQ> `wpŠV`m| VWm _o_moar Ho$ _Ü`Ÿ&
The CPU is fastest in the system. Then main CPU H$s J{V g~go A{YH$ hmoVr h¡Ÿ& BgHo$ ~mX
memory comes. Normally IO devices are slow- _oZ _o_moar H$s J{V hmoVr h¡ & gm_mÝ`V`m BZnwQ>-
est in the system. There is a speed mismatch AmCQ>nwQ> `wpŠV`m| H$s J{V g~go H$_ hmoVr h¡Ÿ& S>mQ>m
between IO devices and CPU. The Data transfer Q´>m§g\$a {d{Y`m± _w»`V: Xmo àH$ma H$s hmoVr h¢…
schemes can be divided into two categories:
1. Program Controlled Data Transfer 1. àmoJ«m_ H§$Q´>moëS> S>mQ>m Q´>m§g\$a
2. Direct Memory Access Data Transfer (DMA) 2. S>m`aoŠQ> _o_moar EŠgog S>mQ>m Q´>m§g\$a (DMA)
1. Program Controlled Data Transfer 1. àmoJ«m_ H§$Q´>moëS> S>mQ>m Q´>m§g\$a
The data transfer between CPU and IO Bg àH$ma H$s {d{Y _| BZnwQ>-AmCQ>nwQ> VWm CPU
devices is controlled with the help of a pro- Ho$ _Ü` H$m S>mQ>m Q´>m§g\$a EH$ àmoJ«m_ Ho$ {Z`§ÌU _| hmoVm
gram. The CPU executes this program and data h¡Ÿ& CPU àmoJ«m_ H$mo EŠOrŠ`yQ> H$aVm h¡Ÿ& Bg {d{Y H$m
is transferred to the IO when it is ready. This Cn`moJ V~ C{MV hmoVm h¡ O~ H$_ _mÌm _| OmZH$mar H$m