Page 323 - Mechatronics with Experiments

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ELECTRONIC COMPONENTS FOR MECHATRONIC SYSTEMS 309
metal oxide silicon (CMOS). Logic device families differ from each other in terms of their
power consumption and the speed of operation. When mixed series of logic ICs are used in
a circuit, the most important factors to consider are the current loading and current driving
capacity of the device. The design should make sure that each device can drive the gates it
is connected to and does not present an overload current to the other devices.
The TTL nominal voltage level for logic 1 is 5 VDC, and for logic 0 is 0 VDC. The
supply voltage must be in the range of 4.75 V to 5.25 V. Per gate power consumption of a
TTL device is in the order of few miliamps. The output current sinking capacity is about
30 mA. A CMOS device supply voltage can be in the 3 to 18 VDC range. Per gate power
consumption of a CMOS device is 80% less than that of a TTL device. The CMOS logic
family requires a less stringent power supply voltage, consumes less power but is sensitive
to static voltages. Digital logic devices are realized by complex networks of transistors on
an integrated circuit (IC). The basic device number for the TTL NAND gate is 7400 (the
military version is 5400 for extended temperature range) and has four NAND gates. The
variations of the 7400 series take the following forms: 74L00 for low power but slower
devices, 74H00 for high power and high speed, and a more recent version is the 74LS00
series for low power but high speed performance. The TTL series IC chips are numbered
in 74LSxxx form where the xxx code is assigned based on the chronological introduction
of the device into the market.
When an IC chip is used in a circuit and some of the pins are not used, they should be
connected to common or pulled up to high voltage state. Open pins are not a recommended
design practice since they tend to fluctuate and give a bad logic state.

5.7.1 Logic Devices
AND, OR, XOR, NOT (inverter), NAND, and NOR are the most common logic gates in
digital electronics. The AND gate has two inputs and one output. The output logic is 1 if
both inputs are 1, otherwise it is logic 0 state. The AND logic among more than two inputs
can be implemented by cascading many AND gates in one chip. The NOT gate inverts
the logic state of the input. The output is always at the opposite logic state to that of the
input. Combining NOT gates with AND and OR, we form NAND and NOR gates. The
gate symbols and logic diagrams are illustrated in Figure 5.41 and Figure 5.42.

5.7.2 Decoders
Decoders are used as device selection components in a computer bus system. When a
computer places the address of a device on the bus, the decoder attached to each device
checks that and gives either an ON or OFF output signal if it is the addressed device. So,
only one decoder should give logic 1 output in response to a unique address in the bus.
By combining AND and NOT gates, it is straightforward to design address decoders. In
general, an 8-bit general purpose decoder is set to respond to a specific address by setting
8-dip switches ON/OFF which define the address of the device the decoder is connected to
(Figure 5.43).

5.7.3 Multiplexer

A multiplexer is used to connect one of multiple input lines to an output line. A typical
application of a multiplexer is with analog to digital converters (ADC). For instance, there
can be four or eight analog signal channels connected to one ADC. Under program control,
each channel is connected to the ADC for conversion. Such ADC converters are referred
to as 4-channel multiplexed ADC or 8-channel multiplexed ADC. The desired channel is