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NPP Computer Basics and Windows Fundamentals 25
Some important CPU registers and their func- OmVm h¡& Hw$N> _hËdnyU© CPU a{OñQ>am| Ho$ Zm_ VWm
tions can be described as below: CZHo$ H$m`© {ZåZmZwgma h¢ :
(a) General Purpose Register (a) gm_mÝ` H$m`© a{OñQ>a
As the name suggests these registers are O¡gm {H$ Zm_ go hr ñnï> h¡ {H$ BZH$m Cn`moJ Hw$N>
used for certain general operations like storing gm_mÝ` H$m`© O¡go BZnwQ> g§»`mE± d CZHo$ n[aUm_ `m
input data and output data, temporary storage
of results and storage of some memory loca- H$^r-H$^r _o_moar-nVm aIZo _| {H$`m OmVm h¡Ÿ& O¡go {H$
tion. For example, B, C, D,E are 8 bit registers B,C,D,E _mB©H«$moàmogoga 8085 Ho$ gm_mÝ` H$m`© a{OñQ>a
in CPU 8085. Microprocessor 8086/8088 has 16 h¢Ÿ& _mBH«$moàmogoga 8086/8088 _| 16-{~Q>m| dmbo Mma
bit general purpose registers as AX, BX, CX, gm_mÝ` H$m`© a{OñQ>a h¢ ; AX, BX, CX VWm DX `{X
DX. For performing 8 bit operation each can be 8-{~Q>m| na H$m`© H$aZm h¡ Vmo BÝh| AmR>-AmR> {~Q> Ho$ 8
utilised as two 8 bit register. e.g. AL, AH, BL, a{OñQ>am| H$s Vah H$m_ _| bo gH$Vo h¢Ÿ& O¡go AL, AH,
BH etc. All these registers can be used in As-
sembly Language Programming instructions BL, BH Am{X BZ a{OñQ>am| H$m Cn`moJ Agoå~br b¢½doO
(Mnemonic). Therefore these are called pro- àmoJ«mq‘J B§ñQ´>³eÝg ‘| hmoVm h¡Ÿ& AV… BZH$mo àmoJ«m_o~b
grammable registers. a{OñQ>a ^r H$hVo h¢Ÿ&
(b) Non-Programmable Registers (b) Zm°Z-àmoJ«m_o~b a{OñQ>a … (AñWm`r a{OñQ>a)
(Temporary Register)
Certain registers cannot be used in assem- BZ a{OñQ>am| H$mo Agoå~br ^mfm Ho$ {ZX}em| _| Cn`moJ
bly language instructions. These are called non- _| Zht bm gH$VoŸ& BZH$m Cn`moJ àmoJ«m_ Ho$ {H«$`mÝd`Z Ho$
programmable registers. They are required for
temporary storage of some data while execu- g_` S>mQ>m H$mo Wmo‹S>r Xoa Ho$ {bE g§J«hrV H$aZo _| hmoVm h¡Ÿ&
tion of an instruction. For example, W, Z are Bgr{bE BÝh| AñWm`r a{OñQ>a H$hVo h¢Ÿ& O¡go, W, Z
temporary registers in microprocessor 8085. _mB©H«$moàmogoga 8085 Ho$ AñWm`r a{OñQ>a h¢Ÿ&
(c) Index Register (c) BÝS>oŠg a{OñQ>a (gyMH$m§H$ a{OñQ>a)
These registers are special purpose regis- `o {deof H$m`© a{OñQ>a hmoVo h¢, {OZ_| EH$ gyMH$m§H$
ters which hold the index value. This value is
added to the address part of the instruction to g§J«hrV hmoVm h¡ Ÿ& à^mdr ES´>og {ZH$mbZo hoVw Bg gyMH$m§H$
calculate the effective address. The address part H$mo {ZX}e _| {X`o J`m ES´>og go Omo‹S>Vo h¢ Ÿ& {ZX}e _| {X`m
of the instruction points to the beginning ad- J`m ES´>og EH$ g_yh H$m nhbm ES´>og Xem©Vm h¡ Ÿ& BÝS>oŠg
dress of a data array. Each operand is stored
relative to the beginning address (BASE ad- _mZ (gyMH$m§H$) go `h _mby_ hmoVm h¡ {H$ S>mQ>m àma§{^H$
dress). The index value refers to the offset of nVo (~og ES´>og) go {H$VZr Xya h¡ Ÿ& {H$gr CPU _| EH$ `m
the array. CPU may contain one or more index A{YH$ BÝS>oŠg a{OñQ>a hmo gH$Vo h¢ Ÿ& O¡go, _mB©H«$moàmogoga
registers. For example, 8086/8088 has two in-
dex registers SI (Source Index) and DI (Desti- 8086/8088 _| Xmo BÝS>oŠg a{OñQ>a h¡ SI (gmog© B§S>oŠg)
nation Index). VWm DI (S>opñQ>ZoeZ B§S>oŠg) Ÿ&
(d) Instruction Register (d) B§ñQ´>ŠeZ a{OñQ>a ({ZX}e a{OñQ>a)
The instruction resides in memory prior to EŠOrŠ`yQ> hmoZo go nyd© {ZX}e H$m ~mBZar H$moS> _o_moar _|
its execution. When it is fetched by the CPU, ahVm h¡Ÿ& O~ `h _o_moar go {ZH$bH$a (\o$M hmoH$a) CPU