Page 90 - Handout Digital Electronics

Exercise

Consider the diagram below:

1 Use it to generate truth table and:

(i) The Pbit
(ii) The Cbit
2 If even parity was going to be used what changes would you make to the logic circuit diagram?

3 What is major disadvantage of this logic circuit set up in terms of error detection and correction?

Lecture 10 Video Lecture

Watch the complete explanation of this chapter here:
https://www.youtube.com/watch?v=wvJc9CZcvBc

Lecture 10 Online Quiz

Test your understanding by completing the quiz:
https://forms.office.com/Pages/DesignPageV2.aspx?origin=NeoPortalPage&subpage=design&id=6It6CPsfU
EqeY6fdRNP5cqrl2mW71GRAiQAluYy6dIVUNTlKVjJTWkNDRkZRN0UzWVFaTjg1TVlUTi4u

90